Category
Supported Opcodes
Flow Control
•
repeat
•
jump
•
jump_if
•
set_loop
•
end_loop
•
exit_loop
•
exit_loop_if
•
call
•
return
•
keep_alive
•
match
•
halt
Sequencer Flags and Registers
•
set_seqflag
•
clear_seqflag
•
write_reg
Signal
•
set_signal
•
pulse_signal
•
clear_signal
Digital Source and Capture
•
capture_start
•
capture
•
capture_stop
•
source_start
•
source
Pipeline Latencies
Minimum delay between
source_start
opcode and the first
source
opcode or
subsequent
source_start
opcode
3 μs
Matched and failed condition pipeline
latency
80 cycles
PXIe-6570 Specifications
|
© National Instruments
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11
