National Instruments PCI-6601, User Manual

Page: 37 / 52

Chapter 3 Signal Connections
NI 660x User Manual 3-12 ni.com
Yo
u
can export the Ctr n Gate signal to the I/O connector’s defa
u
lt PFI inp
u
t
for each Ctr n Gate. For example, yo
u
can export the gate signal connected
to co
u
nter 0 to the PFI 38/CTR 0 GATE pin, even if another PFI is inp
u
tting
the Ctr0Gate signal. This o
u
tp
u
t is set to high-impedance at start
u
p.
Fig
u
re 3-6 shows the timing req
u
irements for the Ctr n Gate signal.
Figure 3-6. Timing Requirements for CtrnGate Signal
Table 3-6 shows the minim
u
m p
u
lse width req
u
ired for the internal signals.
Note For b
u
ffered meas
u
rements, the minim
u
m period req
u
ired for the Ctr n Gate signal is
determined by how fast the system can transfer data from yo
u
r device to comp
u
ter memory.
Counter
n
Auxiliary Signal
Yo
u
can select any PFI or RTSI, as well as many other internal signals as
the Co
u
nter n A
u
xiliary (Ctr n A
u
x) signal. M
u
ch like this Ctr n Gate signal,
the Ctr n A
u
x signal is config
u
red in edge-detection or level-detection mode
depending on the application performed by the co
u
nter. The a
u
x signal can
perform many different operations incl
u
ding starting and stopping the
co
u
nter, generating interr
u
pts, and saving the co
u
nter contents. Yo
u
can
also
u
se this signal to control the co
u
nting direction in edge-co
u
nting
applications.
Table 3-6. Minimum Pulse Width for Ctr n Gate Internal Signals
Parameter Minimum
Minimum with
RTSI Connector Description
Tgatepw 5 ns 5 ns Ctr n Gate minim
u
m p
u
lse width
Ctr
n
Gate
Tgatepw
Tgatepw