National Instruments PC-DIO-96/PnP, User Manual

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Appendix D Register-Level Programming
PC-DIO-96/PnP User Manual D-24
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National Instruments Corporation
/* Calculate register addresses */
porta = BASE_A APORTAoffset;
portb = BASE_A APORTBoffset;
portc = BASE_A APORTCoffset;
cnfg = BASE_A ACNFGoffset;
/* EXAMPLE 1*/
outp(cnfg,0xC0); /* Port A is in mode 2. */
while (!(inp(portc) & 0x80)); /* Wait until OBFA* is set,
indicating that the data last
written to port A has been read.
*/
outp(porta,0x67); /* Write the data to port A. */
while (!(inp(portc) & 0x20)); /* Wait until IBFA is set,
indicating that data is
available in port A to be read.
*/
valread = inp(porta); /* Read data from port A. */
}
Interrupt Programming Examples for the 82C55A
The following examples show the process required to enable interrupts
for several different operating modes. The interrupt handling routines
and interrupt installation routines for the 82C55A are not included;
however, sample routines for the 82C53 are included later in the
appendix. These routines can be modified to function for the 82C55A.
Consult your computer’s technical reference manual for additional
information. Also, if you generate interrupts with the PC3 or PC0 lines
of the 82C55A devices, you must maintain the active high level until the
interrupt service routine is entered. Otherwise, the host computer
considers the interrupt a spurious interrupt and routes the request to the
channel responsible for handling spurious interrupts. To prevent this
problem, try using some other I/O bit to send feedback to the device
generating the interrupt. In this way, the interrupting device can be
signaled that the interrupt service routine has been entered. For further
information on using PC3 and PC0 for interrupts, see the Interrupt
Handling section later in this appendix.
Main() {
#define BASE_ADDRESS 0x180 /* Board located at address 180 */
#define APORTAoffset 0x00 /* Offset for PPI A, port A */
#define APORTBoffset 0x01 /* Offset for PPI A, port B */
#define APORTCoffset 0x02 /* Offset for PPI A, port C */