Number of DSP48 slices
25 x 18 multipliers
32
Embedded block RAM
1,152 kbits
cRIO-9113 and cRIO-9114
FPGA type
Virtex-5 LX50
Number of flip-flops
28,800
Number of 6-input LUTs
28,000
Number of DSP48 slices
25 x 18 multipliers
48
Embedded block RAM
1,728 kbits
cRIO-9116
FPGA type
Virtex-5 LX85
Number of flip-flops
51,840
Number of 6-input LUTs
51,840
Number of DSP48 slices
25 x 18 multipliers
48
Embedded block RAM
3,456 kbits
cRIO-9118
FPGA type
Virtex-5 LX110
Number of flip-flops
69,120
Number of 6-input LUTs
69,120
Number of DSP48 slices
25 x 18 multipliers
64
Embedded block RAM
4,608 kbits
Timebases (40, 80, 120, 160, or 200 MHz)
Accuracy
±100 ppm (max)
Frequency-dependent jitter (peak-to-peak, max)
40 MHz
250 ps
80 MHz
422 ps
120 MHz
422 ps
160 MHz
402 ps
200 MHz
402 ps
14
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NI cRIO-9111/9112/9113/9114/9116/9118