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National Instruments NI cDAQTM-9138, User Manual

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NI cDAQ-9138/9139 User Manual

LabVIEW RT Options Setup Menu

(NI cDAQ-9138/9139 for LabVIEW Real-Time)

Use this menu to configure boot options for

LabVIEW RT if it is installed on the controller. If you are not using LabVIEW RT, you should
leave these settings at default.

Note

The following settings temporarily override the behavior of the DIP switches.

Refer to the

section of Chapter 1,

Getting Started with the cDAQ

, for more information about the DIP switches.

•

Change Boot Config on Next Boot

—This setting temporarily overrides the combined

state of the LABVIEW RT and SAFE MODE switches. This setting selects whether the
controller should boot LabVIEW RT, LabVIEW RT Safe Mode, or an installed OS such as
Windows. The default is

No

.

•

Reset IP Address on Next Boot

— This setting temporarily overrides the state of the IP

RESET switch. The default is

No

.

•

Disable Startup VI on Next Boot

— This setting temporarily overrides the state of the NO

APP switch. The default is

No

.

•

LabVIEW RT Configuration Overrides

—Use this setting to access the

LabVIEW RT

Configuration Overrides

submenu. Refer to the

LabVIEW RT Configuration Overrides

section for more information.

LabVIEW RT Configuration Overrides Submenu

(NI cDAQ-9138/9139 for LabVIEW Real-Time)

Use this submenu to override specific settings

optimized for using LabVIEW RT. Normally, you do not need to modify these settings, as the
factory default settings provide the most compatible and optimal configuration possible.

Note

When booting LabVIEW RT, certain options are automatically set to

minimize system jitter and optimize LabVIEW RT performance. These settings can
be manually overridden using the menu options described below but may result in an
increase in overall system jitter, so care should be taken when enabling this setting on
a Real Time system.

•

CPU Hyper Threading

—

(NI cDAQ-9139 for LabVIEW Real-Time)

This setting allows

overriding the optimal configuration for Intel Hyper-Threading technology when booting
LabVIEW RT. Refer to the

CPU Configuration Submenu

section for more information. The

default value is

Use RT Default

.

•

CPU Turbo Boost

—

(NI cDAQ-9139 for LabVIEW Real-Time)

This setting allows

overriding the optimal configuration for Intel Turbo Boost technology when booting
LabVIEW RT. Refer to the

CPU Configuration Submenu

section for more information. The

default value is

Use RT Default

.

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Summary of Contents for NI cDAQTM-9138

Page 1: ...NI cDAQ TM 9138 9139 User Manual NI CompactDAQ cDAQ 9138 9139 Eight Slot Stand Alone Chassis with Integrated Controller NI cDAQ 9138 9139 User Manual June 2014 371042C 01...

Page 2: ...email addresses and current events National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 For further support information refer to the N...

Page 3: ...ESS FOR A PARTICULAR PURPOSE TITLE OR NON INFRINGEMENT AND ANY WARRANTIES THAT MAY ARISE FROM USAGE OF TRADE OR COURSE OF DEALING NI DOES NOT WARRANT GUARANTEE OR MAKE ANY REPRESENTATIONS REGARDING TH...

Page 4: ...es independent from National Instruments and have no agency partnership or joint venture relationship with National Instruments Patents For patents covering National Instruments products technology re...

Page 5: ...sis 1 15 Using the cDAQ Chassis on a Desktop 1 17 Mounting the cDAQ Chassis on a Panel 1 19 Mounting the cDAQ Chassis on a DIN Rail 1 20 Removing I O Modules from the cDAQ Chassis 1 21 NI cDAQ Chassis...

Page 6: ...2 6 Using an Analog Source 2 6 Routing the Reference Trigger Signal to an Output Terminal 2 6 AI Pause Trigger Signal 2 7 Using a Digital Source 2 7 Using an Analog Source 2 7 Getting Started with AI...

Page 7: ...ut 4 8 Digital Output Data Generation Methods 4 8 Digital Output Triggering Signals 4 9 Digital Output Timing Signals 4 10 Getting Started with DO Applications in Software 4 12 Digital Input Output Co...

Page 8: ...23 Sample Clocked Buffered Two Signal Separation Measurement 5 23 Counter Output Applications 5 24 Simple Pulse Generation 5 24 Single Pulse Generation 5 24 Single Pulse Generation with Start Trigger...

Page 9: ...o an Output Terminal 5 37 Counter n Internal Output and Counter n TC Signals 5 37 Routing Counter n Internal Output to an Output Terminal 5 37 Frequency Output Signal 5 37 Routing Frequency Output to...

Page 10: ...cDAQ 9138 9139 for Windows refer to the Installing the NI cDAQ 9138 9139 for Windows section For NI cDAQ 9138 9139 for LabVIEW Real Time refer to the Installing the NI cDAQ 9138 9139 for LabVIEW Real...

Page 11: ...Because some C Series I O modules may have more stringent certification standards than the NI cDAQ 9138 9139 chassis the combined system may be limited by individual component restrictions Refer to th...

Page 12: ...P 54 as defined by IEC EN 60529 Caution The USB ports require the NI Industrial USB extender cable NI part number 152166 xx The cable must be used in conduit to wire to a nonhazardous location Do not...

Page 13: ...the specified EMC performance install snap on ferrite bead National Instruments part number 711849 01 included in the shipping kit in accordance with the product installation instructions Caution To e...

Page 14: ...Touch the antistatic package to a metal part of your computer chassis before removing the device from the package Remove the device from the package and inspect it for loose components or any other si...

Page 15: ...rd and mouse to the bottom two USB ports on the cDAQ chassis 5 Attach a ring lug to a 1 31 mm2 16 AWG or larger wire Remove the ground screw from the ground terminal on the front panel Attach the ring...

Page 16: ...Squeeze the latches and insert the I O module into the module slot and press firmly on the connector side of the I O module until the latches lock the I O module into place Repeat these steps to insta...

Page 17: ...ine successful chassis installation 15 Run a Test Panel in MAX by expanding Devices and Interfaces NI cDAQ model number right clicking your C Series module and selecting Test Panels to open a test pan...

Page 18: ...h cDAQ chassis with LabVIEW Real Time The NI DAQmx driver software is included on the disk shipped with your kit and is available for download at ni com support The documentation for NI DAQmx is avail...

Page 19: ...RT DIP Switch in OFF Position 10 Wire your external power source as outlined in the Wiring Power to the cDAQ Chassis section The cDAQ chassis requires an external power supply that meets the specific...

Page 20: ...14 Wire the C Series I O module as indicated in the C Series module documentation 15 Launch Measurement Automation Explorer MAX by double clicking the MAX icon on the host computer desktop Expand Rem...

Page 21: ...an embedded stand alone application at startup refer to the LabVIEW Help For more information about setting up the controller as an RT target refer to the LabVIEW Help For more information about conf...

Page 22: ...on the front panel identifies the power input in use When the LED is lit green V1 is in use when the LED is lit yellow V2 is in use Caution Do not connect V2 to a DC mains supply or to any supply requ...

Page 23: ...1 to C voltage drops below 9 V the cDAQ chassis switches to V2 If the V2 to C voltage is less than 9 V operation may be interrupted Note If the cDAQ chassis is using V1 and a secondary power source is...

Page 24: ...to read the serial number after you have mounted the chassis Caution You must mount the chassis horizontally on a flat vertical metallic surface using the NI panel mount kit part number 781919 01 to a...

Page 25: ...he top and the bottom of the chassis for air circulation Allow 50 8 mm 2 in in front of modules for cabling clearance for common connectors such as the 10 terminal detachable screw terminal connector...

Page 26: ...ts to the Chassis 10 Use a number 2 Phillips screwdriver to tighten the captive screw on the end bracket 11 Repeat steps 9 and 10 to attach the other end bracket to the other end of the chassis Note T...

Page 27: ...12 shows the dimensions of a chassis after the desktop mounting kit is installed Figure 1 12 Dimensions of the cDAQ Chassis with Desktop Mounting Kit Installed 39 6 mm 1 56 in 28 2 mm 1 11 in 28 1 mm...

Page 28: ...the NI panel mount kit part number 781919 01 to mount the cDAQ chassis on a flat surface Complete the following steps 1 Fasten the mounting plate to the chassis using a number 2 Phillips screwdriver a...

Page 29: ...ly You can order the NI DIN rail mount kit part number 781987 01 to mount the chassis on a DIN rail You need one clip for mounting the chassis on a standard 35 mm DIN rail Complete the following steps...

Page 30: ...locks in place on the DIN rail Figure 1 17 DIN Rail Clip Parts Locator Diagram Caution Remove the I O modules before removing the chassis from the DIN rail Removing I O Modules from the cDAQ Chassis C...

Page 31: ...signals Caution Do not hot swap VGA devices while the cDAQ chassis is in a hazardous location or connected to high voltages Table 1 3 Video Port Pin Locations Pinout Pin Signal Name Signal Descriptio...

Page 32: ...s mass storage devices or expansion I O chassis Go to ni com info and enter Info Code exyerk for information about best practices for data logging performance with the NI cDAQ 9138 9139 Refer to Figur...

Page 33: ...You must use Ethernet port 1 to configure the NI cDAQ 9138 9139 for LabVIEW Real Time you cannot configure the controller through Ethernet port 2 To use Ethernet port 2 you must assign a static IP ad...

Page 34: ...ta rate selected Green Solid 100 Mbit s data rate selected Off 10 Mbit s data rate selected Table 1 6 Ethernet Cable Wiring Connections Pin Connector 1 Connector 2 Straight Through Crossover 1 white o...

Page 35: ...tions and signal descriptions Figure 1 19 RS 232 Serial Port Pin Locations You can use the Ring Indicator RI WAKE on pin 9 to wake the chassis from a low power state You can drive RI WAKE with logic l...

Page 36: ...ion modular jack to a 9 position D SUB plug Go to ni com info and enter Info Code exswh5 for up to date information about supported NI devices for the NI cDAQ 9138 9139 chassis MXI Express Port You ca...

Page 37: ...shown in Figure 1 1 Table 1 7 DIP Switches Switch Description DISABLE RT NI cDAQ 9138 9139 for LabVIEW Real Time The position of the DISABLE RT determines the operating system the cDAQ chassis boots...

Page 38: ...does not launch If the software on the controller is corrupted you must put the controller into safe mode and reformat the controller drive You can put the controller into safe mode by powering it up...

Page 39: ...g default configuration settings 9 600 bits per second Eight data bits No parity One stop bit No flow control You can use the BIOS setup menu to modify the CONSOLE OUT configuration settings for the R...

Page 40: ...APP switch to the OFF position create an application using the LabVIEW Application Builder and configure the application in LabVIEW to launch at startup If you already have an application configured...

Page 41: ...or the locations of the LEDs Table 1 8 lists the LEDs and status indications Table 1 8 LED Indications LED LED Color LED State Indication LINK Green Solid MXI Express communication established Yellow...

Page 42: ...ch is in the ON position or there is no software installed on the chassis Refer to the DIP Switches section for information about the SAFE MODE DIP switch 4 flashes every few seconds Software error Th...

Page 43: ...tings to factory default values If the CMOS battery is dead the CMOS reset button will not work Refer to the Resetting the System CMOS and BIOS Settings section of Appendix A Controller Operating Syst...

Page 44: ...r wire Use shorter wire for better EMC performance CPU eXpansion Module CXM Connector In the future the CXM connector will enable you to connect additional industry standard I O to the cDAQ chassis CF...

Page 45: ...02 151733 05 151733 10 Industrial USB extension with retention cable 0 5 and 2 m lengths 152166 xx DIN rail mountable screw terminal adapter COM 2 termination resistor connection 778674 01 Cable adap...

Page 46: ...anges or industrial signal types you can usually make your wiring connections directly from the C Series I O modules to your sensors actuators C Series I O modules can sometimes provide isolation from...

Page 47: ...Triggering Signals section of Chapter 2 Analog Input The Analog Output Triggering Signals section of Chapter 3 Analog Output The Digital Input Triggering Signals section of Chapter 4 Digital Input Ou...

Page 48: ...nual Processor and Ports Refer to the specifications document for your cDAQ chassis for information about the processors on the cDAQ chassis Refer to the NI cDAQ Chassis Features section for informati...

Page 49: ...trigger is a signal that causes an action such as starting or stopping the acquisition of data When you configure a trigger you must decide how you want to produce the trigger and the action you want...

Page 50: ...n Output Terminal You can route Sample Clock to any output PFI terminal Sample Clock is an active high pulse by default AI Sample Clock Timebase Signal The AI Sample Clock Timebase signal is divided d...

Page 51: ...ts on every Sample Clock pulse Sigma Delta Modules Sigma delta C Series analog input modules function much like SSH modules but use A D converters that require a high frequency oversample clock to pro...

Page 52: ...r example if running an AI task at 1 kHz using a module with a maximum rate of 10 Hz the slow module returns 100 samples of the first point followed by 100 samples of the second point etc Other module...

Page 53: ...to utilize analog triggering Routing AI Start Trigger to an Output Terminal You can route the Start Trigger signal to any output PFI terminal The output is an active high pulse AI Reference Trigger S...

Page 54: ...NI DAQmx Help or the LabVIEW Help for more information Using an Analog Source Some C Series I O modules can generate a trigger based on an analog signal In NI DAQmx this is called the Analog Comparis...

Page 55: ...Source Some C Series I O modules can generate a trigger based on an analog signal In NI DAQmx this is called the Analog Comparison Event When you use an analog trigger source the internal sample clock...

Page 56: ...n Methods When performing an analog output operation you either can perform software timed or hardware timed generations Hardware timed generations must be buffered Software Timed Generations With a s...

Page 57: ...a continuous generation continues until you stop the operation There are three different continuous generation modes that control how the data is written These modes are regeneration onboard regenera...

Page 58: ...ignals The cDAQ chassis features the following AO waveform generation timing signals AO Sample Clock Signal AO Sample Clock Timebase Signal AO Start Trigger Signal AO Pause Trigger Signal Signals with...

Page 59: ...following signals A pulse initiated by host software Any PFI terminal AI Reference Trigger AI Start Trigger The source also can be one of several internal signals on the cDAQ chassis Refer to the Devi...

Page 60: ...al other than the onboard clock as the source of the sample clock the generation resumes as soon as the pause trigger is deasserted and another edge of the sample clock is received as shown in Figure...

Page 61: ...are normal when a DAC switches from one voltage to another it produces glitches due to released charges The largest glitches occur when the most significant bit of the DAC code changes You can build...

Page 62: ...I O modules can be used in any chassis slot and can perform the following tasks Software timed and hardware timed digital input output tasks Counter timer tasks can be used in up to two slots Accessi...

Page 63: ...hree trigger actions Up to two C Series parallel digital input modules can be used in any chassis slot to supply a digital trigger To find your module triggering options refer to the documentation inc...

Page 64: ...e as an output from the chassis Using an Internal Source To use DI Sample Clock with an internal source specify the signal source and the polarity of the signal Use the following signals as the source...

Page 65: ...e start trigger to the first sample Using a Digital Source To use DI Start Trigger with a digital source specify a source and a rising or falling edge Use the following signals as the source Any PFI t...

Page 66: ...access this KnowledgeBase go to ni com info and enter the Info Code rdcanq When the reference trigger occurs the cDAQ chassis continues to write samples to the buffer until the buffer contains the nu...

Page 67: ...t signal is low and resumes when the signal goes high or vice versa Note Depending on the C Series I O module capabilities you may need two modules to utilize analog triggering Note Pause triggers are...

Page 68: ...edge lines is detected by the change detection task Routing Change Detection Event to an Output Terminal You can route ChangeDetectionEvent to any output PFI terminal Change Detection Acquisition You...

Page 69: ...neration Methods When performing a digital output operation you either can perform software timed or hardware timed generations Hardware timed generations must be buffered Software Timed Generations W...

Page 70: ...ard regeneration the entire buffer is downloaded to the FIFO and regenerated from there After the data is downloaded new data cannot be written to the FIFO To use onboard regeneration the entire buffe...

Page 71: ...output PFI terminal DO Sample Clock is active high by default DO Sample Clock Timebase Signal The DO Sample Clock Timebase do SampleClockTimebase signal is divided down to provide a source for DO Sam...

Page 72: ...falling edge of the Analog Comparison Event signal depending on the trigger properties The analog trigger circuit must be configured by a simultaneously running analog input task Note Depending on the...

Page 73: ...s called the Analog Comparison Event depending on the trigger properties When you use an analog trigger source the samples are paused when the Analog Comparison Event signal is at a high or low level...

Page 74: ...ers You can enable a programmable debouncing filter on each PFI signal When the filter is enabled the chassis samples the inputs with a user configured Filter Clock derived from the chassis timebase T...

Page 75: ...ter Clock period Tuser Tuser 1 Filter Clock period Pulse widths are nominal values the accuracy of the chassis timebase and I O distortion will affect these values Table 4 1 Selectable PFI Filter Sett...

Page 76: ...unter signals refer to the Default Counter Timer Routing section Each counter has a FIFO that can be used for buffered acquisition and generation Each counter also contains an embedded counter Embedde...

Page 77: ...son Event Not all timed counter operations require a sample clock For example a simple buffered pulse width measurement latches in data on each edge of a pulse For this measurement the measured signal...

Page 78: ...he counter values can be read on demand or with a sample clock Refer to the following sections for more information about edge counting options Single Point On Demand Edge Counting Buffered Sample Clo...

Page 79: ...is sampled on each active edge of a sample clock and stored in the FIFO The STC3 transfers the sampled values to host memory using a high speed data stream The count values returned are the cumulative...

Page 80: ...es returned by the counter A pulse width measurement will be accurate even if the counter is armed while a pulse train is in progress If a counter is armed while the pulse is in the active state it wi...

Page 81: ...locked buffered pulse width measurement is similar to single pulse width measurement but buffered pulse width measurement takes measurements over multiple pulses correlated to a sample clock The count...

Page 82: ...the following sections for more information about cDAQ chassis pulse measurement options Single Pulse Measurement Implicit Buffered Pulse Measurement Sample Clocked Buffered Pulse Measurement Single...

Page 83: ...he sampled values to host memory using a high speed data stream Figure 5 10 shows an example of a sample clocked buffered pulse measurement Figure 5 10 Sample Clocked Buffered Pulse Measurement Note I...

Page 84: ...pulse measurement Single Semi Period Measurement Single semi period measurement is equivalent to single pulse width measurement Implicit Buffered Semi Period Measurement In implicit buffered semi per...

Page 85: ...its of frequency and duty cycle high and low time or high and low ticks When reading data 10 points in a semi period measurement will get an array of five high times and five low times When you read 1...

Page 86: ...fk to the Source of the counter The known timebase can be an onboard timebase such as 80 MHz Timebase 20 MHz Timebase or 100 kHz Timebase or any other signal with a known rate You can configure the c...

Page 87: ...unter You also can generate the pulse externally and connect it to a PFI terminal You only need to use one counter if you generate the pulse externally Route the signal to measure fx to the Source of...

Page 88: ...in Figure 5 14 Assume this signal to measure has frequency fx NI DAQmx automatically configures Counter 0 to generate a single pulse that is the width of N periods of the source input signal Figure 5...

Page 89: ...counted between sample clocks and T2 is the number of ticks counted of the known timebase as shown in Figure 5 15 The frequency measured is fx fk T1 T2 Figure 5 15 Sample Clocked Buffered Frequency M...

Page 90: ...se variables apply to each method summarized in Table 5 2 One counter With one counter measurements a known timebase is used for the source frequency fk The measurement time is the period of the frequ...

Page 91: ...d One Counter Two Counter High Frequency Large Range fk Known timebase Known timebase Known timebase Measurement time gating period Max frequency error fk Max error Note Accuracy equations do not take...

Page 92: ...t the accuracy measurement time and accuracy listed in Table 5 3 But if your signal ramped up to 5 M then with a divide down of 50 your measurement time is 0 01 ms but your error is now 0 125 The erro...

Page 93: ...a large range of frequencies with two counters measures high and low frequency signals accurately However it requires two counters and it has a variable sample time and variable error dependent on the...

Page 94: ...ing sections for more information about the cDAQ chassis position measurement options Measurements Using Quadrature Encoders Measurements Using Two Pulse Encoders Buffered Sample Clock Position Measur...

Page 95: ...ns You must refer to the documentation for your quadrature encoder to obtain timing of channel Z with respect to channels A and B You must then ensure that channel Z is high during at least a portion...

Page 96: ...tion measurement position measurement using a sample clock the counter increments based on the encoding used after the counter is armed The value of the counter is sampled on each active edge of a sam...

Page 97: ...rising or falling edge of the Gate input to be the active edge Use this type of measurement to count events or measure the time that occurs between edges on two signals This type of measurement is so...

Page 98: ...ration measurement Figure 5 24 Implicit Buffered Two Signal Edge Separation Measurement Sample Clocked Buffered Two Signal Separation Measurement A sample clocked buffered two signal separation measur...

Page 99: ...neration Pulse Train Generation Frequency Generation Frequency Division Pulse Generation for ETS Simple Pulse Generation Refer to the following sections for more information about the cDAQ chassis sim...

Page 100: ...nning of the pulse You also can specify the pulse width The delay is measured in terms of a number of active edges of the Source input You can specify a pulse width The pulse width is also measured in...

Page 101: ...ar on the Counter n Internal Output signal of the counter You can route the Start Trigger signal to the Gate input of the counter You can specify a delay from the Start Trigger to the beginning of eac...

Page 102: ...when the counter is armed to the beginning of the pulse train The delay is measured in terms of a number of active edges of the Source input You specify the high and low pulse widths of the output sig...

Page 103: ...ime of your generation on each sample clock edge Idle time and active time can also be defined in terms of frequency and duty cycle or idle ticks and active ticks Note On buffered implicit pulse train...

Page 104: ...enerates a predetermined number of pulse train updates Each point you write defines pulse specifications that are updated with each sample clock When a sample clock occurs the current pulse idle follo...

Page 105: ...operation is started thereby preventing any problems that may occur due to excessive bus traffic With non regeneration old data is not repeated New data must be continually written to the buffer If th...

Page 106: ...6 The Frequency Output Timebase can be either the 20 MHz Timebase the 20 MHz Timebase divided by 2 or the 100 kHz Timebase The duty cycle of Frequency Output is 50 if the divider is either 1 or an eve...

Page 107: ...nt to be 10 the delay between the active Gate edge and the pulse on the output increases by 10 every time a new pulse is generated Suppose you program your counter to generate pulses with a delay of 1...

Page 108: ...Counter 1 Source the source input to Counter 1 Counter 2 Source the source input to Counter 2 or Counter 3 Source the source input to Counter 3 Note All counter timing signals can be filtered Refer t...

Page 109: ...able routing options Routing Counter n Source to an Output Terminal You can route Counter n Source out to any PFI terminal Counter n Gate Signal The Counter n Gate signal can perform many different op...

Page 110: ...be routed to the Counter n Aux input Any PFI terminal AI Reference Trigger AI Start Trigger Analog Comparison Event Change Detection Event In addition a counter s Internal Output Gate or Source can b...

Page 111: ...er Internally software routes the Arm Start Trigger to the Counter n HW Arm input of the counter Routing Signals to Counter n HW Arm Input Any of the following signals can be routed to the Counter n H...

Page 112: ...ample Clock Routing Counter n Sample Clock to an Output Terminal You can route Counter n Sample Clock out to any PFI terminal The PFI circuitry inverts the polarity of Counter n Sample Clock before dr...

Page 113: ...erations you can use the arm start trigger to have start trigger like behavior The arm start trigger can be used for synchronizing multiple counter input and output tasks When using an arm start trigg...

Page 114: ...scaler acts as a frequency divider on the Source and puts out a frequency that is one eighth or one half of what it is accepting as shown in Figure 5 37 Figure 5 37 Prescaling Prescaling is intended t...

Page 115: ...External or Internal Source Less than 20 MHz With an external or internal source less than 20 MHz the module generates a delayed Source signal by delaying the Source signal by several nanoseconds The...

Page 116: ...to ensure efficient data movement Routes timing and control signals The acquisition generation sub systems use these signals to manage acquisitions and generations These signals can come from the fol...

Page 117: ...s It can function as the Source input to the 32 bit general purpose counter timers The 20 MHz Timebase is generated by dividing down the 80 MHz Timebase as shown in Figure 6 1 100 kHz Timebase You can...

Page 118: ...the warning The POST can display the following warning messages First Boot Detected This warning is displayed at the first boot of the system after updating the BIOS firmware This warning indicates t...

Page 119: ...assis For more information about restoring the hard drive to factory default condition go to ni com info and enter the Info Code hdrecovery913x Note Restoring the hard drive to factory default conditi...

Page 120: ...ou first enter the BIOS setup utility Use the following keys to navigate through the BIOS setup utility Left Arrow Right Arrow Use these keys to move between the different setup menus If you are in a...

Page 121: ...gs that normally do not require modification If you have specific problems such as unbootable disks or resource conflicts you may need to examine these settings Caution Changing settings in this menu...

Page 122: ...ormally you do not need to modify these settings as the factory default settings provide the most compatible and optimal configuration possible Hyper Threading NI cDAQ 9139 This setting enables or dis...

Page 123: ...to the power button Valid options are Normal and Disabled The default value is Normal If the value is Normal the system responds to the power button as defined by the OS If the value is Disabled press...

Page 124: ...nagement Technology feature Note Intel Active Management Technology is disabled by default For information on how to enable configure and disable AMT go to ni com info and enter the Info Code intelamt...

Page 125: ...guration possible Terminal Type This setting selects the terminal emulation type Valid values are ANSI VT100 VT100 and VT UTF8 The default value is ANSI Bits Per Second This setting selects the serial...

Page 126: ...Overrides submenu Refer to the LabVIEW RT Configuration Overrides Submenu section for more information LabVIEW RT Configuration Overrides Submenu NI cDAQ 9138 9139 for LabVIEW Real Time Use this subm...

Page 127: ...nt The BIOS will first attempt to boot from the device associated with 1st Boot Device followed by 2nd Boot Device and 3rd Boot Device If multiple boot devices are not present the BIOS setup utility w...

Page 128: ...f hard drive devices The highest priority device is displayed on the main Boot Option Priorities list Optionally each device can also be Disabled if the device should never be used as a boot device CD...

Page 129: ...he BIOS setup utility are discarded The setup utility then exits and reboots the controller The Esc key can also be used to select this option Save Changes Changes made to BIOS settings during this se...

Page 130: ...er to the cDAQ chassis The BIOS Reset Detected warning message appears onscreen If the CMOS battery is dead the CMOS reset button does not work You must complete the following alternative steps to res...

Page 131: ...des information about writing applications for taking measurements and controlling measurement devices The following references to documents assume you have NI DAQmx LabVIEW 2012 or later and where ap...

Page 132: ...ition and instrument control applications Open the Getting Started with LabVIEW manual by selecting Start All Programs National Instruments LabVIEW LabVIEW Manuals or by navigating to the labview manu...

Page 133: ...s before attempting to create a deterministic real time application NET Languages without NI Application Software With the Microsoft NET Framework you can use NI DAQmx to create applications using Vis...

Page 134: ...you identify your systems accuracy and reliability requirements and provides warranty sparing and calibration services to help you maintain accuracy and minimize downtime over the life of your system...

Page 135: ...cussion Forums at ni com forums NI Applications Engineers make sure every question submitted online receives an answer Software Support Service Membership The Standard Service Program SSP is a renewab...

Page 136: ...3 3 AO Sample Clock Timebase 3 4 AO Start Trigger 3 4 applications counter input 5 3 counter output 5 24 edge counting 5 3 arm start trigger 5 38 B BIOS advanced setup menu A 4 launching setup utilit...

Page 137: ...ters 5 1 cascading 5 39 edge counting 5 3 generation 5 24 input applications 5 3 other features 5 39 output applications 5 24 prescaling 5 39 pulse train generation 5 25 retriggerable single pulse gen...

Page 138: ...LINK LEDs 1 24 cabling 1 25 ports 1 23 external source less than 40 MHz 5 40 F features 1 22 features counter 5 39 filters digital input parallel DIO modules only 4 6 PFI 4 13 floppy drive BBS priorit...

Page 139: ...ncy 5 10 implicit buffered pulse width 5 6 implicit buffered semi period 5 9 period 5 18 position 5 19 pulse width 5 5 semi period 5 8 single pulse width 5 5 single semi period 5 9 single two signal e...

Page 140: ...21 RESET button 1 31 resetting the system CMOS and BIOS settings A 13 restoring hard drive A 2 retriggerable single pulse generation 5 26 RS 232 serial port 1 26 RS 485 422 serial port 1 27 S SAFE MOD...

Page 141: ...00 MHz source 5 40 external source less than 40 MHz 5 40 internal source less than 40 MHz 5 40 system CMOS A 1 T technical support B 3 training B 3 trigger arm start 5 38 pause 5 38 start 5 38 two sig...

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