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Chapter 3

Signal Connections

National Instruments Corporation

3-17

NI 660x User Manual

PXI TIO devices

se PXI trigger line 7 as their RTSI clock line. The

maxim

m timebase provided by the PXI TIO device is phase locked to the

10 MHz PXI backplane clock. By

sing other PXI mod

les that phase lock

their board clocks to the 10 MHz PXI backplane clock, yo

can better

synchronize operation in a m

lti-mod

le PXI system. The phase locking is

enabled by defa

lt and can be disabled by way of software. If the mod

sed in a compact PCI chassis that does not have the 10 MHz PXI

backplane clock, the phase locking is a

tomatically disabled. Additionally,

PXI trigger line 6 corresponds to PXI star trigger on PXI TIO devices.

Fig

re 3-9 shows the RTSI signal connection scheme for PXI TIO devices.

Figure 3-9.

RTSI Signal Connection for PXI

+5 V Power Source

The +5 V pin on the I/O connector s

pplies power from the comp

ter

power s

pply thro

gh a self-resetting f

se. The f

se resets a

tomatically

within a few seconds after removal of an overc

rrent condition. The power

pin is referenced to the D GND pins and can s

pply power to external

digital circ

itry. The power rating for this +5 V pin on the NI 660

+4.65 to +5.25 VDC at 1 A.

PXI Star 6

Ctr

Source

Ctr

Gate

Ctr

Aux

Ctr

InternalOutput

20 MHz Timebase

Master Timebase

PXI Trigger 7

TSI Bus Connector

TSI Switch

PXI Trigger

<0..5>

Summary of Contents for NI 6601

Page 1: ...DAQ NI 660x User Manual NI 6601 NI 6602 and NI 6608 Devices NI 660x User Manual ni com manuals Deutsch Français December 2009 372119B 01 ...

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Page 3: ...ing recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected by copyright and other intellectual property laws Where NI software may be used to reproduce software or other ...

Page 4: ...re encouraged to try to correct the interference by one or more of the following measures Reorient the antenna of the receiver the device suffering interference Relocate the transmitter the device generating interference with respect to the receiver Plug the transmitter into a different outlet so that the transmitter and the receiver are on different branch circuits Some hardware may require the u...

Page 5: ...on 2 2 Duplicate Count Prevention 2 4 Example Application That Works Correctly No Duplicate Counting 2 5 Example Application That Works Incorrectly Duplicate Counting 2 6 Example Application That Prevents Duplicate Counting 2 6 Enabling Duplicate Count Prevention in NI DAQmx 2 7 When to Use Duplicate Count Prevention 2 7 When Not to Use Duplicate Count Prevention 2 7 Transfer Rates 2 8 High Precis...

Page 6: ...nter Out Delay 3 12 Counter n Gate Signal 3 12 Counter n Auxiliary Signal 3 13 Counter n Internal Output Signal 3 14 Hardware Arm Start Triggers 3 14 Counter Pairs 3 15 Counter Applications 3 15 Real Time System Integration Bus 3 16 RTSI Triggers 3 16 5 V Power Source 3 17 I O Signals 3 18 Field Wiring Considerations 3 18 Noise 3 18 Crosstalk 3 19 Inductive Effects 3 20 Transmission Line Effects 3...

Page 7: ...s from the last dialog box This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on a product refer to the Read Me First Safety and Electromagnetic Compatibility document for information about precautions to take bold Bold text denotes items that ...

Page 8: ...ments devices NI DAQmx is the software you use to communicate with and control your DAQ device Measurement Automation Explorer Help for NI DAQmx This help file contains information about configuring and testing DAQ devices SCXI devices SCC devices and RTSI cables using Measurement Automation Explorer MAX for NI DAQmx and information about special considerations for operating systems DAQ Assistant ...

Page 9: ... modes such as event counting time measurement frequency measurement encoder position measurement pulse generation and square wave generation The NI 660x devices contain the National Instruments MITE PCI interface The MITE offers bus master operation PCI burst transfers and high speed DMA controller s for continuous scatter gather DMA without requiring DMA resources from your computer Refer to the...

Page 10: ...e sub bus are disabled by default and never enabled Caution Damage can result if these lines are driven by the sub bus NI is not liable for any damage resulting from improper signal connections Getting Started Before installing your DAQ device you must install the software you plan to use with the device Installing NI DAQ Driver Software If you are using NI DAQ 7 1 or later refer to the DAQ Gettin...

Page 11: ...d Cables Accessory Description SH68 68 D1 Shielded 68 conductor cable R6868 cable 68 conductor flat ribbon cable BNC 2121 BNC connector block with built in test features CA 1000 Configurable connector accessory SCB 68 Shielded screw connector block TB 2715 Front mount terminal block for NI PXI 660x TBX 68 DIN rail connector block CB 68LP Low cost screw connector block CB 68LPR Low cost screw conne...

Page 12: ... and digital I O can share the lines on PFI 0 31 For more information about the signals that can be driven onto PFI lines refer to the I O Connector Pinout section of this document For information about how to implement specific digital I O functions refer to the application software documentation Prescaling Prescaling allows the counter to count a signal that is faster than the maximum timebase o...

Page 13: ...several counters are measuring or operating off the same external signal For example suppose counters 0 and 1 are configured for triggered pulse generation and each counter uses the same external trigger this external signal is connected to PFI 38 on the I O connector and both counters have PFI 38 selected as their GATE After the trigger signal propagates through the I O pad of the ASIC the time f...

Page 14: ...nting mode is enabled for that counter Figures 2 2 and 2 3 illustrate how pad synchronization can be useful These figures assume a 0 5 and a 0 75 SOURCE cycle delay between the PFI 38 input pin and CTR 0 GATE and CTR 1 GATE respectively Figure 2 2 shows counter 0 at the gate edge on PFI 38 one source period before counter 1 Figure 2 3 shows both counters at the gate edge on PFI 38 at the same time...

Page 15: ...hat are a slow or non periodic external source Duplicate count prevention applies only to buffered counter applications such as measuring frequency or period For such buffered applications the counter should store the number of times an external source pulses between rising edges on the Gate signal Counter Source PFI 38 at CTR 0 GATE PFI 38 at CTR 1 GATE Sampled GATE at Ctr0 Sampled GATE at Ctr1 1...

Page 16: ...the next rising edge of the Gate the counter stores a 2 because two Source pulses occurred after the previous rising edge of Gate The counter synchronizes or samples the Gate signal with the Source signal So the counter does not detect a rising edge in the Gate until the next Source pulse In this example the counter stores the values in the buffer on the first rising Source edge after the rising e...

Page 17: ...Gate signals to the maximum onboard timebase By synchronizing to the timebase the counter detects edges on the Gate even if the Source does not pulse This enables the correct current count to be stored in the buffer even if no Source edges occur between Gate signals Figure 2 6 shows an example application that prevents duplicate counting Figure 2 6 Example Application That Prevents Duplicate Count...

Page 18: ...NI DAQmx Help for more information When to Use Duplicate Count Prevention Use duplicate count prevention for buffered measurements that use an external CtrnSource signal and the frequency of the signal is less than or equal to one fourth of the maximum onboard timebase Use this mode if you are using a low frequency or you expect zero CtrnSource edges between successive edges of the CtrnGate signal...

Page 19: ...ter than interrupt driven transfers NI DAQmx uses DMA by default for buffered acquisitions Note The maximum sustainable transfer rate is always lower than the peak transfer rate Table 2 1 lists the maximum transfer rates for TIO devices Table 2 1 Maximum Transfer Rates DMA Interrupt Finite Operation Buffer Size Samples Rate kS s Buffer Size Samples Rate kS s 100 5 000 100 77 1 000 2 150 1 000 77 1...

Page 20: ...pport and search using keyword phase lock Using the OCXO as the SOURCE Counter Using the OCXO as the timebase source of the counter you can route the 10 MHz clock to CtrnSource Using the OCXO as the 10 MHz PXI Backplane Clock Your PXI chassis has a built in 10 MHz backplane clock that is independently routed to each peripheral slot An independent buffer on the chassis drives the clock signal to ea...

Page 21: ... 0 NI PXI 6608 in Slot 2 of PXI Chassis 80 MHz Phase Locked to 10 MHz PXI Backplane Clock TIO 1 10 MHz OCXO 10 MHz Circuit toDrive 10MHz PXI Backplane Clock 80 MHz VCXO Phase Lock Loop 10 MHz PXI Backplane Clock 10 MHz from OCXO is Used as 10 MHz PXI Backplane Clock PXI Backplane PXI CLK10 in Driving 10 MHz Supplied by OCXO TIO 0 NI PXI 6608 or NI PXI 6602 in Slot 3 of PXI Chassis 80 MHz Phase Loc...

Page 22: ...stable frequency of approximately 45 ppb occurs after the first year of normal use For example if the OCXO has a perfect stable frequency of 10 MHz after warm up after the first 10 days of operation the stable frequency drifts 11 25 ppb During the next 50 days of operation this frequency will drift an additional 11 25 ppb thus making the total drift caused by aging to be 22 5 ppb After 365 days dr...

Page 23: ...on Caution NI is not liable for any damage or injury that results from register level programming the TIO Series devices For information about programming the NI 660x devices at the register level refer to the NI 660X Register Level Programmer Manual available from ni com manuals The National Instruments Measurement Hardware DDK provides development tools and a register level programming interface...

Page 24: ... internal timing signal For example if you need the Counter 0 Source signal as an output on the I O connector software can turn on the output driver for the PFI 39 CTR 0 SRC pin Caution Do not drive a PFI signal externally when it is configured as an output When using the PFI pin as an input you can individually configure each PFI for edge or level detection and for polarity selection You can use ...

Page 25: ...k and a maximum of two filter clocks The filter is sensitive to the duration for which a digital signal transitions from one state to another If a square wave is applied to the filter its propagation will depend on its frequency and duty cycle There are four filter settings available in the TIO devices 5 μs 1 μs 500 ns and 100 ns The 5 μs filter will pass all pulse widths high and low that are 5 μ...

Page 26: ...fault For more information about using the digital filters on your device refer to the NI DAQmx Help Power On State The PFI lines are weakly pulled down within the NI TIO ASIC and the RTSI lines are weakly pulled high Connections for pulling up the PFI lines or for stronger pull down connections must be made external to the NI 660x These connections affect the drive strength of the NI 660x when th...

Page 27: ... SRC 31 65 D GND D GND 30 64 CTR 3 GATE P0 26 index z 3 PFI 26 PFI 24 P0 24 CTR 3 OUT 29 63 CTR 3 AUX P0 25 channel B 3 PFI 25 PFI 23 channel A 4 P0 23 CTR 4 SRC 28 62 D GND D GND 27 61 CTR 4 GATE P0 22 index z 4 PFI 22 PFI 20 P0 20 CTR 4 OUT 26 60 CTR 4 AUX P0 21 channel B 4 PFI 21 PFI 19 channel A 5 P0 19 CTR 5 SRC 25 59 D GND D GND 24 58 CTR 5 GATE P0 18 index z 5 PFI 18 PFI 16 P0 16 CTR 5 OUT ...

Page 28: ... 5 PFI 5 PFI 3 P0 3 12 46 D GND D GND 11 45 P0 2 PFI 2 PFI 0 P0 0 10 44 P0 1 PFI 1 PFI 32 CTR 1 OUT 9 43 RG PFI 34 index z 1 CTR 1 GATE 8 42 D GND PFI 35 channel A 1 CTR 1 SRC 7 41 D GND PFI 33 channel B 1 CTR 1 AUX 6 40 CTR 0 AUX channel B 0 PFI 37 PFI 36 CTR 0 OUT 5 39 D GND Reserved 4 38 Reserved PFI 38 index z 0 CTR 0 GATE 3 37 Reserved PFI 39 channel A 0 CTR 0 SRC 2 36 GND 5 V 1 35 RG Table 3...

Page 29: ... 20 P0 20 D GND PFI 23 P0 23 PFI 24 P0 24 CTR 3 OUT D GND PFI 27 P0 27 CTR 3 SOURCE PFI 28 P0 28 CTR 2 OUT D GND PFI 31 P0 31 CTR 2 SOURCE R GND RESERVED RESERVED PFI 37 CTR 0 AUX D GND D GND R GND D GND D GND PFI 1 P0 1 PFI 2 P0 2 D GND PFI 5 P0 5 PFI 6 P0 6 D GND D GND PFI 10 P0 10 PFI 11 P0 11 PFI 12 P0 12 PFI 13 P0 13 D GND R GND PFI 17 P0 17 PFI 18 P0 18 D GND PFI 21 P0 21 PFI 22 P0 22 D GND ...

Page 30: ...ATE PFI 15 P0 15 CTR 6 SOURCE CTR 5 OUT PFI 16 P0 16 D GND PFI 19 P0 19 CTR 5 SOURCE CTR 4 OUT PFI 20 P0 20 D GND PFI 23 P0 23 CTR 4 SOURCE PFI 24 P0 24 CTR 3 OUT D GND PFI 27 P0 27 CTR 3 SOURCE PFI 28 P0 28 CTR 2 OUT D GND PFI 31 P0 31 CTR 2 SOURCE R GND RESERVED RESERVED PFI 37 CTR 0 AUX D GND D GND R GND D GND D GND PFI 1 P0 1 PFI 2 P0 2 D GND PFI 5 P0 5 PFI 6 P0 6 D GND D GND PFI 10 P0 10 CTR ...

Page 31: ...d sources can be used as outputs associated with the counter When used as such these PFI lines drive the selected GATE or SOURCE associated with these lines For example if PFI 39 is configured as an output it will drive the selected SOURCE of counter 0 Table 3 3 summarizes what you can drive onto the different PFI lines when they are used as outputs Table 3 3 PFI Lines Used as Outputs PFI Line Pos...

Page 32: ...P0 23 or CTR 4 SOURCE1 PFI 24 P0 24 or CTR 3 OUT PFI 25 P0 25 PFI 26 P0 26 or CTR 3 GATE PFI 27 P0 27 or CTR 3 SOURCE PFI 28 P0 28 or CTR 2 OUT PFI 29 P0 29 PFI 30 P0 30 or CTR 2 GATE PFI 31 P0 31 or CTR 2 SOURCE PFI 32 CTR 1 OUT PFI 33 Input only PFI 34 CTR 1 GATE PFI 35 CTR 1 SOURCE PFI 36 CTR 0 OUT PFI 37 Input only PFI 38 CTR 0 GATE PFI 39 CTR 0 SOURCE 1 Counters 4 through 7 are not available ...

Page 33: ...0 MHz The counters on the NI 6602 and NI 6608 also have an 80 MHz timebase Each counter has a gate auxiliary and source input Each of these inputs can be an internal or external signal that connects to the I O connector Each counter also has an output signal Counter n Source Signal You can select any PFI as well as many other internal signals as the Counter n Source CtrnSource signal The CtrnSourc...

Page 34: ... is Tsrcpw ns the low phase must be Tsrcper Tsrcpw Table 3 4 Minimum Pulse Width and Period for CtrnSource Internal Signals Parameter Minimum Minimum with RTSI Connector Description NI 6601 NI 6602 Tsrcpw without prescaling 5 ns 5 ns 5 ns CtrnSource minimum pulse width without prescaling Tsrcpw with prescaling 3 5 ns 3 5 ns 3 5 ns CtrnSource minimum pulse width with prescaling Tsrcper without pres...

Page 35: ... block are larger due to cable delays Note When using duplicate count prevention mode the minimum period of signal used as the source of the counter must be greater than or equal to four times the period of the maximum timebase For more information refer to the Duplicate Count Prevention section of this document Counter n Gate Signal You can select any PFI or RTSI as well as many other internal si...

Page 36: ...rnGate signal is determined by how fast the system can transfer data from your device to computer memory Counter n Auxiliary Signal You can select any PFI or RTSI as well as many other internal signals as the Counter n Auxiliary CtrnAux signal Much like this CtrnGate signal the CtrnAux signal is configured in edge detection or level detection mode depending on the application performed by the coun...

Page 37: ...ounter TC of counter n The counter generates a terminal count when its count value rolls over The two software selectable output options are pulse on TC and toggle output polarity on TC The output polarity is software selectable for both options This output is set to high impedance at startup Hardware Arm Start Triggers You can arm each counter using a software command or by using the Arm Start Tr...

Page 38: ... Counter Applications You can use the TIO device in the following counter based applications Counting Edges Frequency Measurement Period Measurement Position Measurement with Linear and Angular Encoders Pulse Width Measurement Semi Period Measurement Two Edge Separation Measurement Pulse Generation You can perform these measurements through programmed I O interrupt or DMA data transfer mechanisms ...

Page 39: ...es in the system For a RTSI connector pinout go to ni com info and enter rtsipin RTSI Triggers TIO devices require a frequency timebase for its operation This frequency timebase must come from the onboard crystal oscillator and is required even if the device is receiving a MasterTimebase signal from the RTSI trigger bus Any TIO device can drive its 20MHzTimebase signal onto the RTSI Trigger 7 pin ...

Page 40: ...he phase locking is automatically disabled Additionally PXI trigger line 6 corresponds to PXI star trigger on PXI TIO devices Figure 3 9 shows the RTSI signal connection scheme for PXI TIO devices Figure 3 9 RTSI Signal Connection for PXI 5 V Power Source The 5 V pin on the I O connector supplies power from the computer power supply through a self resetting fuse The fuse resets automatically withi...

Page 41: ...ers available on each PFI line to reduce errors that these problems might cause Noise For noise immunity take the following precautions When routing signals to the TIO device keep cabling away from noise sources Separate the TIO device signal lines from high current or high voltage lines High current or high voltage lines that run in parallel paths at a close distance can induce currents in or vol...

Page 42: ...ng The speed of the transition on the offending line PFI 10 in the previous example The length of the cable and the proximity of the victim to the offending line The source impedance of the victim line V1 in the previous example and the level of the offending line V0 Crosstalk is most likely to cause measurement errors when the victim line is at a low voltage If this crosstalk is 0 5 V or greater ...

Page 43: ...hich the PFI line is twisted Figure 3 11 shows an example of wiring that minimizes inductive effects Figure 3 11 Example of Wiring That Minimizes Inductive Effects The SH68 68 D1 cable is designed to help minimize inductive effects Each signal line is twisted with a ground wire connected to a nearby pin Each ground wire is shared by two signal lines Table 3 9 lists the signals and the D GND pin nu...

Page 44: ... PFI 14 55 PFI 15 55 PFI 16 24 PFI 17 24 PFI 18 59 PFI 19 59 PFI 20 27 PFI 21 17 PFI 22 62 PFI 23 62 PFI 24 30 PFI 25 30 PFI 26 65 PFI 27 65 PFI 28 33 PFI 29 33 PFI 30 68 PFI 31 68 PFI 32 42 PFI 33 39 PFI 34 42 PFI 35 41 Table 3 9 Signals and D GND Pin Number on 68 Pin Connector Block Continued PFI Number Pin Number for D GND ...

Page 45: ...d values for RP and CP are 68 Ω and 150 pF respectively For reflection problems that occur when the NI 660x receives the signal use series termination at the device driving the signal The sum of RS and the output impedance of the source is approximately 80 Ω Typically this condition results in a value of approximately 50 Ω for RS To use serial termination when the source impedance is larger than 8...

Page 46: ...User Manual Figure 3 12 shows an example of parallel and series termination Figure 3 12 Parallel and Series Termination Example 660x Driving Signal Driving Signal Receiving Signal Receiving Signal Parallel Termination Series Termination Other Device 660x Rs RP CP Other Device ...

Page 47: ...ervice Program Membership This program entitles members to direct access to NI Applications Engineers via phone and email for one to one technical support as well as exclusive access to on demand training modules via the Services Resource Center NI offers complementary membership for a full year after purchase after which you may renew to continue your benefits For information about other technica...

Page 48: ...t by visiting ni com certification Calibration Certificate If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration If you searched ni com and could not find the answers you need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Wo...

Page 49: ...mbols degree negative of or minus per percent plus or minus positive of or plus A A amperes ANSI American National Standards Institute API application programming interface arm To enable a counter to start an operation If the application requires a trigger an armed counter waits for the trigger to begin the operation ASIC application specific integrated circuit ...

Page 50: ...made consecutively and measurement results are stored in a buffer bus The group of conductors that interconnect individual circuitry in a computer Typically a bus is the expansion vehicle to which I O or other devices are connected Examples of PC buses are the AT EISA and PCI bus C C Celsius clock Hardware component that provides timing for various device operations cm centimeters CMOS complementa...

Page 51: ...timing information and general purpose counter timers on National Instruments E Series boards DC direct current decode Used in the context of motion encoders The two channels of a motion encoder indicate information about movement and direction of movement of an external device Decoding refers to extracting this information from the signals on these channels device A plug in data acquisition board...

Page 52: ...tandard architecture encode Used in the context of motion encoders Motion encoders provide information about movement and direction of movement of an external device The process of producing the pulses that contain this information is called encoding ETS equivalent time sampling F FSK frequency shift keying G GATE The signal that controls the operation of a counter This signal may start or stop th...

Page 53: ...s interrupt A computer signal indicating that the CPU should suspend its current task to service a designated activity interrupt level The relative priority at which a device can interrupt IOH current output high IOL current output low IRQ interrupt request signal ISA industry standard architecture L LabVIEW Laboratory Virtual Instrument Engineering Workbench a National Instruments graphical progr...

Page 54: ...generators transformers fluorescent lights soldering irons CRT displays computers electrical storms welders radio transmitters and internal sources such as semiconductors resistors and capacitors Noise corrupts signals you are trying to send or receive O OCXO oven controlled crystal oscillator operating system Base level software that controls a computer runs programs interacts with users and comm...

Page 55: ...nects if you use the SH100 100 S2 shielded cable while they are ground pins if you use the R100100 unshielded ribbon cable ribbon cable A flat cable in which the conductors are side by side ringing The oscillation of a signal about a high voltage or low voltage state immediately following a transition to that state RTSI Bus real time system integration bus the National Instruments timing bus that ...

Page 56: ...stops some form of data capture tri state A third output state other than high or low in which the output is undriven TTL transistor transistor logic two pulse encoder A motion encoder that has two channels channels A and B Pulses on channel A indicate movement in one direction while pulses on channel B indicate movement in the opposite direction This type of encoder is also referred to as up down...

Page 57: ...nal Instruments Corporation G 9 NI 660x User Manual Vin volts in VI Virtual Instrument A LabVIEW program so called because it models the appearance and function of a physical instrument W wire Data path between nodes ...

Page 58: ... 8 transfer rates 2 8 Declaration of Conformity NI resources A 2 diagnostic tools NI resources A 1 digital filter description 3 1 example figure 3 2 pad synchronization 2 2 settings table 3 3 digital I O 2 1 digital synchronization 2 2 DMA 1 1 counter applications 3 15 transfer rates 2 8 transfer rates table 2 8 documentation conventions used in the manual vii NI resources A 1 related documentatio...

Page 59: ...bration 2 11 stable frequency deviation 2 11 using as the 10 MHz PXI backplane clock 2 9 using as the SOURCE counter 2 9 outputs 3 8 oven controlled crystal oscillator about 1 1 2 9 calibration 2 11 stable frequency deviation 2 11 using as the 10 MHz PXI backplane clock 2 9 using as the SOURCE counter 2 9 P pad synchronization 2 2 parallel termination 3 22 PFIs 3 1 phase lock 2 9 3 17 pin assignme...

Page 60: ...ate 3 3 PXI compatible products 1 1 signal connection for PCI 3 16 signal connection for PXI 3 17 triggers 3 15 3 16 S signals Counter n Auxiliary signal 3 13 Counter n Gate 3 12 Counter n Internal Output 3 14 Counter n Source 3 10 software counter applications 3 15 NI resources A 1 register level programming 2 12 specifications 1 1 stable frequency change in 2 11 start triggers 3 14 support techn...

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