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NI 6583R User Guide and Specifications
NI 6583 Component-Level Intellectual Property (CLIP)
The LabVIEW FPGA Module includes a feature for HDL IP integration called CLIP. NI FlexRIO
devices support two types of CLIP: user-defined and socketed.
•
User-defined CLIP
allows users to insert HDL IP into an FPGA target, enabling VHDL code to
communicate directly with an FPGA VI.
•
Socketed CLIP
provides the same IP integration functionality of the user-defined CLIP, but also
allows the CLIP to communicate directly with circuitry external to the FPGA. Adapter module
socketed CLIP allows your IP to communicate directly with both the FPGA VI and the external
adapter module connector interface.
Figure 16 shows the relationship between an FPGA VI and CLIP.
Figure 16.
CLIP and FPGA VI Relationship
Adapter Module
CLIP Socket
LabVIEW
FPGA VI
User-Defined
CLIP
NI FlexRIO FPGA Module
FPGA
Exter
nal
I/O Connector
Adapter
Module
Socketed
CLIP
User-Defined
CLIP
Fixed I/O
DRAM 1
CLIP Socket
DRAM 1
CLIP Socket
Socketed
CLIP
Socketed
CLIP
DRAM0
DRAM1
Fix
ed I/O
Fix
ed I/O
Summary of Contents for NI 6583R
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