National Instruments Network Device DAQ S User Manual Download Page 99

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Chapter 7

Counters

National Instruments Corporation

7-27

NI 6124/6154 User Manual

Routing Counter

Source to an Output Terminal

You can route Counter

Source out to any PFI <0..15> or RTSI <0..7>

terminal. All PFIs are set to high-impedance at startup.

Counter

Gate Signal

The Counter

Gate signal can perform many different operations

depending on the application including starting and stopping the counter,
and saving the counter contents.

Routing a Signal to Counter

Gate

Each counter has independent input selectors for the Counter

Gate signal.

Any of the following signals can be routed to the Counter

Gate input:

•

RTSI <0..7>

•

PFI <0..15>

•

AI Reference Trigger (ai/ReferenceTrigger)

•

AI Start Trigger (ai/StartTrigger)

•

AI Sample Clock (ai/SampleClock)

•

AI Convert Clock (ai/ConvertClock)

•

AO Sample Clock (ao/SampleClock)

•

DI Sample Clock (di/SampleClock)

•

DO Sample Clock (do/SampleClock)

•

PXI_STAR

•

Change Detection Event

•

Analog Comparison Event

In addition, Counter 1 Internal Output or Counter 1 Source can be routed to
Counter 0 Gate. Counter 0 Internal Output or Counter 0 Source can be
routed to Counter 1 Gate.

Some of these options may not be available in some driver software.

Routing Counter

Gate to an Output Terminal

You can route Counter

Gate out to any PFI <0..15> or RTSI <0..7>

terminal. All PFIs are set to high-impedance at startup.

Summary of Contents for Network Device DAQ S

Page 1: ...DAQ S Series NI 6124 6154 User Manual DAQ STC2 S Series Simultaneous Sampling Multifunction Input Output Devices NI 6124 6154 User Manual August 2008 372613A 01...

Page 2: ...0 Lebanon 961 0 1 33 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 3390150 Portugal 351 210 311 210 Russi...

Page 3: ...ording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectua...

Page 4: ...t of Communications DOC Changes or modifications not expressly approved by NI could void the user s authority to operate the equipment under the FCC Rules Class A Federal Communications Commission Thi...

Page 5: ...em Overview DAQ Hardware 2 2 DAQ STC2 2 3 Calibration Circuitry 2 4 Internal or Self Calibration 2 4 External Calibration 2 5 Signal Conditioning 2 5 Sensors and Transducers 2 5 Programming Devices in...

Page 6: ...Using an Internal Source 4 17 Using an External Source 4 17 Routing AI Convert Clock Signal to an Output Terminal 4 17 AI Convert Clock Timebase Signal 4 17 AI Hold Complete Event Signal 4 18 AI Start...

Page 7: ...5 DO Sample Clock Signal 6 5 I O Protection for Non Isolated Devices 6 7 Programmable Power Up States for Non Isolated Devices 6 7 DI Change Detection for Non Isolated Devices 6 8 DI Change Detection...

Page 8: ...ble Single Pulse Generation 7 20 Pulse Train Generation 7 21 Continuous Pulse Train Generation 7 21 Finite Pulse Train Generation 7 22 Frequency Generation 7 23 Using the Frequency Generator 7 23 Freq...

Page 9: ...7 Enabling Duplicate Count Prevention in NI DAQmx 7 37 Synchronization Modes 7 37 80 MHz Source Mode 7 38 Other Internal Source Mode 7 39 External Source Mode 7 39 Chapter 8 Programmable Function Inte...

Page 10: ...are 9 10 Chapter 10 Bus Interface MITE and DAQ PnP 10 1 PXI Considerations 10 1 PXI Clock and Trigger Signals 10 1 PXI Express 10 1 Data Transfer Methods 10 2 Changing Data Transfer Methods between DM...

Page 11: ...s to take to avoid injury data loss or a system crash When this symbol is marked on a product refer to the Read Me First Safety and Radio Frequency Interference document for information about precauti...

Page 12: ...plications that are applicable to all programming environments Select Start All Programs National Instruments NI DAQ NI DAQmx Help LabVIEW If you are a new user use the Getting Started with LabVIEW ma...

Page 13: ...s and function reference for NI DAQmx Select Library Reference NI DAQmx Library in the LabWindows CVI Help Measurement Studio If you program your NI DAQmx supported device in Measurement Studio using...

Page 14: ...lication Software With the Microsoft NET Framework version 1 1 or later you can use NI DAQmx to create applications using Visual C and Visual Basic NET without Measurement Studio You need Microsoft Vi...

Page 15: ...ur language to find view and print device documents Training Courses If you need more help getting started developing an application with NI products NI offers training courses To enroll in a course o...

Page 16: ...outputs six DI lines four DO lines and two general purpose 32 bit counter timers If you have not already installed your device refer to the DAQ Getting Started Guide For specifications arranged by S...

Page 17: ...age of the device and adjusts the self calibration constants to account for any errors caused by short term fluctuations in the environment Disconnect all external signals when you self calibrate a de...

Page 18: ...Device Specific Information for NI 6124 and NI 6154 device pinouts Device Specifications Refer to the specifications for your device the NI 6124 Specifications or the NI 6154 Specifications available...

Page 19: ...ables that connect the various devices to the accessories the S Series device and the programming software Refer to Appendix A Device Specific Information for a list of devices and their compatible ac...

Page 20: ...als and measures and controls digital I O signals The following sections contain more information about specific components of the DAQ hardware Figure 2 2 shows the components of the non isolated S Se...

Page 21: ...igure 2 3 General NI 6154 Block Diagram DAQ STC2 The DAQ STC2 implements a high performance digital engine for S Series data acquisition hardware Some key features of this engine include the following...

Page 22: ...e of a known high precision measurement source is compared to the value your device acquires or generates The adjustment values needed to minimize the difference between the known and measured values...

Page 23: ...ny transducers require excitation currents or voltages bridge completion linearization or high amplification for proper and accurate operation Therefore most computer based measurement systems include...

Page 24: ...es use the NI DAQmx driver Each driver has its own API hardware configuration and software configuration Refer to the DAQ Getting Started Guide for more information about the two drivers NI DAQmx incl...

Page 25: ...l Descriptions I O Connector Pin Reference Direction Signal Description AI 0 3 GND Analog Input Channels 0 through 3 Ground These pins are the bias current return point for differential measurements A...

Page 26: ...you can route many different internal AI AO DI or DO timing signals to each PFI terminal You also can route the counter timer outputs to each PFI terminal As a Port 1 or Port 2 digital I O signal you...

Page 27: ...nal or a digital input terminal As an input each PFI terminal can be used to supply an external source for AI or AO timing signals or counter timer inputs Note PFI 0 5 P0 0 5 are isolated from earth g...

Page 28: ...eries Analog Input Block Diagram Figure 4 2 shows the analog input circuitry of each channel of the isolated S Series NI 6154 device Figure 4 2 Isolated S Series Analog Input Block Diagram Instrumenta...

Page 29: ...digital converter ADC digitizes the AI signal by converting the analog voltage into a digital number AI Timing Signals For information about the analog input timing signals available on S Series devi...

Page 30: ...e of 65 536 216 codes meaning one of 65 536 possible digital values These values are spread fairly evenly across the input range So for an input range of 5 V to 5 V the code width of a 16 bit ADC is S...

Page 31: ...t condition is removed Note All inputs are protected at up to 35 V NI 6154 Only The isolation features of the NI 6154 improve the working voltage range in your applications Refer to the NI 6154 Specif...

Page 32: ...an be either finite or continuous Finite sample mode acquisition refers to the acquisitions of a specific predetermined number of data samples After the specified number of samples has been collected...

Page 33: ...e analog input trigger signals Refer to Chapter 11 Triggering for more information about triggers Connecting Analog Input Signals Table 4 1 summarizes the recommended input configuration for different...

Page 34: ...urce is connected in some way to the building system ground and is therefore already connected to a common ground point with respect to the device assuming that the computer is plugged into the same p...

Page 35: ...for Ground Referenced Signals on Isolated Devices Ground Referenced Signal Source Common Mode Noise and Ground Potential Vs Vcm I O Connector AI 0 Connections Shown AI 0 GND AI 0 AI 0 Vm Measured Vol...

Page 36: ...amplifier can reject common mode noise pickup in the leads connecting the signal sources to the device The instrumentation amplifier can reject common mode signals as long as V in and V in input sign...

Page 37: ...o a channel on an isolated S Series device Figure 4 6 Differential Connection for Non Referenced Signals on Isolated Devices DC Coupled You can connect low source impedance and high source impedance D...

Page 38: ...the disadvantage of loading the source down with the series combination sum of the two resistors If for example the source impedance is 2 k and each of the two resistors is 100 k the resistors load do...

Page 39: ...ce the magnetic coupling between lines separate them by a reasonable distance if they run in parallel or run the lines at right angles to each other Do not run signal lines through conduits that also...

Page 40: ...the trigger of interest in addition to data acquired after the trigger Figure 4 8 shows a typical pretrigger DAQ sequence The AI Start Trigger signal ai StartTrigger can be either a hardware or softwa...

Page 41: ...AQmx Help or the LabVIEW Help in version 8 0 or later S Series devices feature the following analog input timing signals AI Sample Clock Signal AI Sample Clock Timebase Signal AI Convert Clock Signal...

Page 42: ...e high You can specify the output to have one of two behaviors With the pulse behavior your DAQ device briefly pulses the PFI terminal once for every occurrence of AI Sample Clock With level behavior...

Page 43: ...not available as an output on the I O connector AI Sample Clock Timebase is divided down to provide one of the possible sources for AI Sample Clock You can configure the polarity selection for AI Samp...

Page 44: ...next AI Sample Clock pulse Using an External Source Use one of the following external signals as the source of AI Convert Clock PFI 0 15 RTSI 0 7 PXI_STAR Analog Comparison Event an analog trigger Ro...

Page 45: ...in a measurement with a software command Once the acquisition begins configure the acquisition to stop When a certain number of points are sampled in finite mode After a hardware reference trigger in...

Page 46: ...ent acquisition To use a reference trigger specify a buffer of finite size and a number of pretrigger samples samples that occur before the reference trigger The number of posttrigger samples samples...

Page 47: ...o can be one of several internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 or later for more information You also can specify wh...

Page 48: ...eous sampling Single point analog input Finite analog input Continuous analog input You can perform these applications through DMA interrupt or programmed I O data transfer mechanisms Some of the appl...

Page 49: ...124 device Figure 5 1 Non Isolated S Series Device Analog Output Block Diagram Figure 5 2 shows the analog output circuitry of an isolated S Series NI 6154 device Figure 5 2 Isolated S Series Device A...

Page 50: ...o analog voltages Minimizing Glitches on the Output Signal When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from on...

Page 51: ...s than non buffered generations because data is moved in large blocks rather than one point at a time For more information about DMA and interrupts refer to the Data Transfer Methods section of Chapte...

Page 52: ...are timed non buffered generations data is written directly to the FIFO on the device Typically hardware timed non buffered operations are used to write single samples with known time increments betwe...

Page 53: ...nnections for Non Isolated S Series Devices Figure 5 4 shows how AO 0 is wired on an isolated S Series device Figure 5 4 Analog Output Connections for Isolated S Series Devices Channel 0 Channel 1 Loa...

Page 54: ...o SampleClock signal to initiate AO samples Each sample updates the outputs of all of the DACs The source of the AO Sample Clock signal can be internal or external You can specify whether the DAC upda...

Page 55: ...out to any PFI 0 15 or RTSI 0 7 terminal Other Timing Requirements A counter on your device internally generates AO Sample Clock unless you select some external source The AO Start Trigger signal sta...

Page 56: ...e is divided down to provide the Onboard Clock source for the AO Sample Clock You specify whether the samples begin on the rising or falling edge of AO Sample Clock Timebase You might use the AO Sampl...

Page 57: ...e generates the AO Sample Clock Timebase signal AO Start Trigger Signal You can use the AO Start Trigger signal ao StartTrigger to initiate a waveform generation If you do not use triggers you begin a...

Page 58: ...riggering Routing AO Start Trigger Signal to an Output Terminal You can route ao StartTrigger out to any PFI 0 15 or RTSI 0 7 terminal The output is an active high pulse PFI terminals are configured a...

Page 59: ...en you use an analog trigger source the samples are paused when the Analog Comparison Event signal is at a high level For more information refer to the Triggering with an Analog Source section of Chap...

Page 60: ...isolated digital inputs and four bank isolated digital outputs Digital I O for Non Isolated Devices NI 6124 Only NI 6124 devices contain eight lines of bidirectional DIO lines on Port 0 In addition T...

Page 61: ...e You can use static DIO lines to monitor or control digital signals Each DIO can be individually configured as a digital input DI or digital output DO All samples of static DI lines and updates of DO...

Page 62: ...g AI Sample clock pulses which in turn generates DI Sample clock pulses as shown in Figure 6 2 Figure 6 2 Digital Waveform Triggering Similarly if you are using AO Sample Clock as the source of DI Sam...

Page 63: ...lock To sample a digital signal independent of an AI AO or DO operation you can configure a counter to generate the desired DI Sample Clock or use an external signal as the source of the clock If the...

Page 64: ...In the retransmit mode after all the samples in the FIFO have been clocked out the FIFO begins outputting all of the samples again in the same order For example if the FIFO contains five samples the...

Page 65: ...LabVIEW Help in version 8 0 or later for more information Using an External Source You can route any of the following signals as DO Sample Clock PFI 0 15 RTSI 0 7 PXI_STAR Analog Comparison Event an a...

Page 66: ...e DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up States for Non Isol...

Page 67: ...dges falling edges or either edge individually on each DIO line The DAQ devices synchronize each DI signal to 80MHzTimebase and then sends the signal to the change detectors The circuitry ORs the outp...

Page 68: ...apter 11 Triggering By routing the Change Detection Event signal to a counter you also can capture the relative time between samples You also can use the Change Detection Event signal to trigger DO or...

Page 69: ...ng Started with DIO Applications in Software on Non Isolated Devices NI 6124 Only You can use non isolated S Series devices in the following digital I O applications Static digital input Static digita...

Page 70: ...used as trigger lines The voltage input and output levels and the current drive levels of the DIO lines are listed in the NI 6154 Specifications Figure 6 5 shows the circuitry of one bank isolated DIO...

Page 71: ...any DI line with voltages outside of its normal operating range The PFI or DIO lines have a smaller operating range than the AI signals Treat the DAQ device as you would treat any static sensitive de...

Page 72: ...om such signal connections Getting Started with DIO Applications in Software on Isolated Devices NI 6154 Only You can use isolated S Series devices in the following digital I O applications Static dig...

Page 73: ...eries Counters Counter 0 Counter 0 Source Counter 0 Timebase Counter 0 Aux Counter 0 HW Arm Counter 0 A Counter 0 B Counter 0 Up_Down Counter 0 Z Counter 0 Gate Counter 0 Internal Output Counter 0 TC...

Page 74: ...point on demand edge counting the counter counts the number of edges on the Source input after the counter is armed On demand refers to the fact that software can read the counter contents at any time...

Page 75: ...ount values returned are the cumulative counts since the counter armed event That is the sample clock does not reset the counter You can route the counter sample clock to the Gate input of the counter...

Page 76: ...known period to the Source input of the counter The counter counts the number of rising or falling edges on the Source signal while the pulse on the Gate signal is active You can calculate the pulse...

Page 77: ...while the Gate input remains active On each trailing edge of the Gate signal the counter stores the count in a hardware save register A DMA controller transfers the stored values to host memory Figur...

Page 78: ...the counter The counter counts the number of rising or falling edges occurring on the Source input between the two active edges of the Gate signal You can calculate the period of the Gate input by mul...

Page 79: ...e input In most applications this first point should be discarded Figure 7 8 shows an example of a buffered period measurement Figure 7 8 Buffered Period Measurement Note that if you are using an exte...

Page 80: ...ware save register A DMA controller transfers the stored values to host memory The counter begins counting when it is armed The arm usually occurs between edges on the Gate input So the first value st...

Page 81: ...r The known timebase can be 80MHzTimebase For signals that might be slower than 0 02 Hz use a slower known timebase You can configure the counter to measure one period of the gate signal The frequency...

Page 82: ...frequency of your signal from the result This method is good for high frequency signals In this method you route a pulse of known duration T to the Gate of a counter You can generate the pulse using a...

Page 83: ...s By using two counters you can accurately measure a signal that might be high or low frequency This technique is called reciprocal frequency measurement In this method you generate a long pulse using...

Page 84: ...ower known timebase Configure Counter 1 to perform a single pulse width measurement Suppose the result is that the pulse width is J periods of the F2 clock From Counter 0 the length of the pulse is N...

Page 85: ...ts take more time and consume some of the available PCI or PXI bandwidth Method 2 is accurate for high frequency signals However the accuracy decreases as the frequency of the signal to measure decrea...

Page 86: ...measurement You must arm a counter to begin position measurements Measurements Using Quadrature Encoders The counters can perform measurements of quadrature encoders that use X1 X2 or X4 encoding A qu...

Page 87: ...15 Figure 7 15 X2 Encoding X4 Encoding Similarly the counter increments or decrements on each edge of channels A and B for X4 encoding Whether the counter increments or decrements depends on which ch...

Page 88: ...s true and channel Z is high Incrementing and decrementing takes priority over reloading Thus when the channel B goes low to enter the reload phase the increment occurs first The reload occurs within...

Page 89: ...er to sample on the rising or falling edge of the sample clock Figure 7 19 shows an example of a buffered edge X1 position measurement Figure 7 19 Buffered Position Measurement Two Signal Edge Separat...

Page 90: ...he counter then stores the count in a hardware save register and ignores other edges on its inputs Software then reads the stored count Figure 7 20 shows an example of a single two signal edge separat...

Page 91: ...eration Single Pulse Generation The counter can output a single pulse The pulse appears on the Counter n Internal Output signal of the counter You can specify a delay from when the counter is armed to...

Page 92: ...a delay from the Start Trigger to the beginning of the pulse You also can specify the pulse width The delay and pulse width are measured in terms of a number of active edges of the Source input After...

Page 93: ...ation For information about connecting counter signals refer to the Default Counter Timer Pinouts section Pulse Train Generation Continuous Pulse Train Generation This function generates a train of pu...

Page 94: ...ter n Internal Output signal is equal to the frequency of the Source input divided by M N For information about connecting counter signals refer to the Default Counter Timer Pinouts section Finite Pul...

Page 95: ...enerates the Frequency Output signal The Frequency Output signal is the Frequency Output Timebase divided by a number you select from 1 to 16 The Frequency Output Timebase can be either the 20 MHz Tim...

Page 96: ...ivalent time sampling ETS application the counter produces a pulse on the output a specified delay after an active edge on Gate After each active edge on Gate the counter cumulatively increments the d...

Page 97: ...e Generation for ETS For information about connecting counter signals refer to the Default Counter Timer Pinouts section Counter Timing Signals S Series devices feature the following counter timing si...

Page 98: ...Source input 80 MHz Timebase 20 MHz Timebase 100 kHz Timebase RTSI 0 7 PFI 0 15 PXI_CLK10 PXI_STAR Analog Comparison Event In addition Counter 1 TC or Counter 1 Gate can be routed to Counter 0 Source...

Page 99: ...ollowing signals can be routed to the Counter n Gate input RTSI 0 7 PFI 0 15 AI Reference Trigger ai ReferenceTrigger AI Start Trigger ai StartTrigger AI Sample Clock ai SampleClock AI Convert Clock a...

Page 100: ...can be routed to Counter 0 Aux Counter 0 Internal Output Counter 0 Gate Counter 0 Source or Counter 1 Gate can be routed to Counter 1 Aux Some of these options may not be available in some driver soft...

Page 101: ...configure counters to be armed on a hardware signal Software calls this hardware signal the Arm Start Trigger Internally software routes the Arm Start Trigger to the Counter n HW Arm input of the coun...

Page 102: ...Frequency Output to any PFI 0 15 terminal All PFIs are set to high impedance at startup The FREQ OUT signal also can be routed to DO Sample Clock and DI Sample Clock Default Counter Timer Pinouts By...

Page 103: ...be configured to begin a finite or continuous pulse generation Once a continuous generation has triggered the pulses continue to generate until you stop the operation in software For finite generatio...

Page 104: ...the input on each rising edge of a filter clock S Series devices use an onboard oscillator to generate the filter clock with a 40 MHz frequency Note NI DAQmx only supports filters on counter inputs Th...

Page 105: ...al Filtering with M Series and CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to ni com info and enter the info code rddfms Prescaling Prescaling al...

Page 106: ...urce is an external signal Prescaling is not available if the counter Source is one of the internal timebases 80MHzTimebase 20MHzTimebase or 100kHzTimebase Duplicate Count Prevention Duplicate count p...

Page 107: ...the previous rising edge of Gate The counter synchronizes or samples the Gate signal with the Source signal so the counter does not detect a rising edge in the Gate until the next Source pulse In this...

Page 108: ...nizes both the Source and Gate signals to the 80 MHz Timebase By synchronizing to the timebase the counter detects edges on the Gate even if the Source does not pulse This enables the correct current...

Page 109: ...counter Source The frequency of the external source is 20 MHz or less You can have the counter value and output to change synchronously with the 80 MHz Timebase In all other cases you should not use d...

Page 110: ...edge of the source and counts on the following rising edge of the source as shown in Figure 7 35 Figure 7 35 80 MHz Source Mode Table 7 5 Synchronization Mode Conditions Duplicate Count Prevention En...

Page 111: ...s shown in Figure 7 36 Figure 7 36 Other Internal Source Mode External Source Mode In external source mode the device generates a delayed Source signal by delaying the Source signal by several nanosec...

Page 112: ...e 10 equivalent directional PFI pins that can be independently configured as an input or output PFI for Non Isolated Devices NI 6124 Only Non isolated S Series devices have 16 Programmable Function In...

Page 113: ...connector each terminal is labeled PFI x P1 x or PFI x P2 x The voltage input and output levels and the current drive levels of the PFI signals are listed in the NI 6124 Specifications PFI for Isolat...

Page 114: ...Output Circuitry on Isolated S Series Devices When a terminal is used as a timing input or output signal it is called PFI x where x is an integer from 0 to 9 When a terminal is used as a static digit...

Page 115: ...e Gate Aux HW_Arm A B Z NI 6124 Only DI Sample Clock di SampleClock NI 6124 Only DO Sample Clock do SampleClock Most functions allow you to configure the polarity of PFI inputs and whether the input i...

Page 116: ...se signals are active low Using PFI Terminals as Static Digital Inputs and Outputs You can configure PFI terminals to be static digital input or output terminals NI 6124 Devices Each PFI can be indivi...

Page 117: ...Filters You can enable a programmable debouncing filter on each PFI RTSI or PXI_STAR signal When the filters are enabled your device samples the input on each rising edge of a filter clock These S Ser...

Page 118: ...nput signal For the 125 ns and 6 425 s filter settings the jitter is up to 25 ns On the 2 56 ms setting the jitter is up to 10 025 s When a PFI input is routed directly to RTSI or a RTSI input is rout...

Page 119: ...I signals Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it Programmable Power Up S...

Page 120: ...high impedance at power up Software can configure the board to power up with the entire port enabled or disabled you cannot enable individual lines If the port powers up enabled you also can configur...

Page 121: ...acquisition generation sub systems use these signals to manage acquisitions and generations These signals can come from the following sources Your S Series device Other devices in your system through...

Page 122: ...z Timebase 100 kHz Timebase The 100 kHz Timebase can be used to generate many of the AI and AO timing signals The 100 kHz Timebase also can be used as the Source input to the 32 bit general purpose co...

Page 123: ...The initiator device routes its 10 MHz reference clock to one of the RTSI 0 7 signals All devices including the initiator device receive the 10 MHz reference clock from RTSI This signal becomes the ex...

Page 124: ...e The bus can route timing and trigger signals between several functions on as many as five DAQ vision motion or CAN devices in the computer In a PXI Express system the RTSI bus consists of the RTSI b...

Page 125: ...ve any of the following signals to any RTSI terminal AI Start Trigger ai StartTrigger AI Reference Trigger ai ReferenceTrigger AI Convert Clock ai ConvertClock AI Sample Clock ai SampleClock AO Sample...

Page 126: ...nceTrigger AI Sample Clock Timebase ai SampleClockTimebase AO Start Trigger ao StartTrigger AO Sample Clock ao SampleClock AO Sample Clock Timebase ao SampleClockTimebase AO Pause Trigger ao PauseTrig...

Page 127: ...3 shows an example of a low to high transition on an input that has its filter set to 125 ns N 5 Figure 9 3 Filter Example Enabling filters introduces jitter on the input signal For the 125 ns and 6 4...

Page 128: ...dule to another allowing precisely timed responses to asynchronous external events that are being monitored or controlled Triggers can be used to synchronize the operation of several different PXI per...

Page 129: ...of a filter clock S Series devices use an onboard oscillator to generate the filter clock with a 40 MHz frequency Note NI DAQmx only supports filters on counter inputs The following is an example of l...

Page 130: ...ersion of the input signal Refer to the KnowledgeBase document Digital Filtering with M Series and CompactDAQ for more information about digital filters and counters To access this KnowledgeBase go to...

Page 131: ...ss interrupt levels and other resources NI S Series PCI PXIe devices incorporate PCI MITE technology to implement a high performance PCI interface PXI Considerations NI 6124 Only PXI clock and trigger...

Page 132: ...CPU can service the interrupt requests If you are using interrupts to acquire data at a rate faster than the rate the CPU can service the interrupts your systems may start to freeze Programmed I O Pr...

Page 133: ...triggering refer to Chapter 4 Analog Input For more information about analog output triggering refer to Chapter 5 Analog Output For more information about counter triggering refer to Chapter 7 Counter...

Page 134: ...ior Triggering with an Analog Source NI 6124 Only Some S Series devices can generate a trigger on an analog signal Figure 11 2 shows the analog trigger circuitry Figure 11 2 Analog Trigger Circuitry Y...

Page 135: ...ection Analog Trigger Actions NI 6124 Only The output of the Analog Trigger Detection circuit is the Analog Comparison Event signal You can program your DAQ device to perform an action in response to...

Page 136: ...Mode Analog Edge Triggering with Hysteresis Hysteresis adds a programmable voltage region above or below the trigger level that an input signal must pass through before the DAQ device recognizes a tri...

Page 137: ...high threshold is the trigger level plus the hysteresis For the trigger to assert the signal must first be above the high threshold then go below the low threshold The trigger stays asserted until the...

Page 138: ...s Refer to the specifications document for your device to find the accuracy and resolution of the analog trigger DACs To improve accuracy you can software calibrate the analog trigger circuitry No har...

Page 139: ...Eight lines of TTL compatible correlated DIO 16 lines of TTL compatible static DIO Two general purpose 32 bit counter timers Increased common mode noise rejection through differential signal connecti...

Page 140: ...PFI 5 P1 5 D GND 5 V D GND PFI 1 P1 1 PFI 0 P1 0 D GND D GND 5 V D GND P0 6 P0 1 D GND P0 4 NC AO 1 AO 0 NC NC NC NC NC NC AI 3 GND AI 3 AI 2 AI 1 GND AI 1 AI 0 D GND NC No Connect PFI 8 P2 0 PFI 7 P...

Page 141: ...scription of each signal refer to the NI 6124 I O Connector Signal Descriptions section of Chapter 3 I O Connector Table A 1 Default NI DAQmx Counter Timer Pins Counter Timer Signal Default Pin Number...

Page 142: ...0 PGIA AI Data ADC 1 AI Convert 1 16 Bit SAR Channel Control 1 Cal Relay Control 1 PGIA AI Data ADC 2 AI Convert 2 16 Bit SAR Channel Control 2 Cal Relay Control 2 PGIA AI Data ADC 3 AI Convert 3 16...

Page 143: ...ccessory use one of the following cables SH68 68 EPM shielded cable SH68 68R1 EP shielded cable with one right angle connector RC68 68 unshielded cable Using SSR or ER Digital Signal Conditioning SSR...

Page 144: ...I O connector on your device Honda 68 position solder cup female connector Honda backshell AMP VHDCI connector For more information about the connectors used for DAQ devices refer to the KnowledgeBase...

Page 145: ...s and from one another Bank isolation for DIO from the chassis Because the NI 6154 has no DIP switches jumpers or potentiometers it can be easily calibrated and configured in software NI 6154 Analog O...

Page 146: ...I 0 P0 0 CTR 0 GATE 32 PFI 1 P0 1 CTR 0 AUX 33 PFI 2 P0 2 CTR 0 OUT 17 PFI 6 P1 0 CTR 0 A 13 PFI 0 P0 0 CTR 0 Z 32 PFI 1 P0 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28...

Page 147: ...8 0 or later For a detailed description of each signal refer to the NI 6154 I O Connector Signal Descriptions section of Chapter 3 I O Connector CTR 0 B 33 PFI 2 P0 2 CTR 1 SRC 15 PFI 3 P0 3 CTR 1 GA...

Page 148: ...evice using a screw terminal accessory such as CB 37F LP unshielded I O connector block with 37 pin D SUB PGIA PGIA AI 0 16 Bit ADC AO 0 16 Bit DAC CAL MUX CAL Circuit AO 0 FPGA Voltage Regulation ISO...

Page 149: ...ielded I O cable 4 m R37F 37M 1 37 pin female to male ribbon I O cable 1 m1 DB37M DB37F EP 37 pin male to female enhanced performance shielded I O cable 1 m EMI shielding For more information about op...

Page 150: ...The Connecting Digital I O Signals on Isolated Devices section of Chapter 6 Digital I O Figure 6 5 Isolated S Series Devices Digital I O Block Diagram Chapter 8 Programmable Function Interfaces PFI D...

Page 151: ...ops Ground loops a common source of error and noise are the result of a measurement system having multiple grounds at different potentials Improved safety Isolation creates an insulation barrier so yo...

Page 152: ...Service Program Membership This program entitles members to direct access to NI Applications Engineers via phone and email for one to one technical support as well as exclusive access to on demand tr...

Page 153: ...ct by visiting ni com certification Calibration Certificate If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration If you searched ni co...

Page 154: ...Prefix Value p pico 10 12 n nano 10 9 micro 10 6 m milli 10 3 k kilo 103 M mega 106 Symbols Degree Greater than Less than Negative of or minus Ohms Per Percent Plus or minus Positive of or plus A A Am...

Page 155: ...are examples AI 1 Analog input 2 Analog input channel signal aliasing The consequence of sampling that causes signals with frequencies higher than half the sampling frequency to appear as lower freque...

Page 156: ...local Configuring virtual channels is integral to every measurement you take in NI DAQmx In NI DAQmx you can configure virtual channels either in MAX or in a program and you can configure channels as...

Page 157: ...ring and measuring analog or digital electrical signals from sensors transducers and test probes or fixtures 2 Generating analog or digital electrical signals dB Decibel the unit for expressing a loga...

Page 158: ...stem are established and measured Also referred to as building ground EEPROM Electrically erasable programmable read only memory ROM that can be erased with an electrical signal and reprogrammed ESD E...

Page 159: ...tem ground such as the earth or building ground Also called referenced signal sources H h Hour Hz Hertz I I O Input output the transfer of data to from a computer system involving communications chann...

Page 160: ...ctions and development tools for controlling measurement devices The advantages of NI DAQmx over earlier versions of NI DAQ include the DAQ Assistant for configuring channels and measurement tasks for...

Page 161: ...Q quantization The process of converting an analog signal to a digital representation Normally performed by an analog to digital converter A D converter or ADC R range The maximum and minimum paramete...

Page 162: ...re sent to DAQ devices in the noisy PC environment SCXI is an open standard available for all vendors sensor A device that responds to a physical stimulus heat light sound pressure motion flow and so...

Page 163: ...ge of the AI CONV CLK signal tout Output delay time tp Period of a pulse train transducer See sensor tsc Source clock period tsp Source pulse width TTL Transistor transistor logic a digital circuit co...

Page 164: ...tion G 11 NI 6124 6154 User Manual VIL Volts input low Vin Volts in Vm Measured voltage VOH Volts output high VOL Volts output low VOUT Volts out Vrms Volts root mean square Vs Ground referenced signa...

Page 165: ...og edge triggering 11 3 with hysteresis 11 4 analog input circuitry 4 2 data acquisition methods 4 4 fundamentals 4 1 overview 4 1 signals AI Convert Clock 4 16 AI Convert Clock Timebase 4 17 AI Refer...

Page 166: ...XI and trigger signals 9 8 routing 9 1 common mode input range 4 3 noise differential ground referenced signals 4 9 differential non referenced or floating signals 4 11 differential signals 4 9 reject...

Page 167: ...ingle pulse generation with start trigger 7 20 synchronization modes 7 37 timing signals 7 25 triggering 7 31 counting edges 7 2 D DAC FIFO 5 2 DACs 5 2 DAQ hardware for isolated devices 2 3 hardware...

Page 168: ...direct memory access DMA 10 2 DMA 10 2 DO Sample Clock signal 6 5 do SampleClock 6 5 documentation conventions used in manual xi NI resources B 1 related documentation xii drivers NI resources B 1 dup...

Page 169: ...I I O connector NI 6124 A 2 NI 6154 A 8 signal descriptions isolated devices 3 2 non isolated devices 3 1 I O protection 6 7 8 8 input coupling 4 2 input polarity and range 4 3 input signals using PF...

Page 170: ...1 features A 7 I O connector pinout A 8 isolation and digital isolators A 11 isolation barrier and digital isolators 4 2 5 2 specifications A 13 working voltage range 4 4 NI support and services B 1 N...

Page 171: ...s 9 9 trigger 9 8 Q quadrature encoders 7 14 R real time system integration bus 9 4 reciprocal frequency measurement 7 11 reference clock 10 MHz 9 3 external 9 2 related documentation xii retriggerabl...

Page 172: ...triggerable 7 20 with start trigger 7 20 pulse width measurement 7 4 semi period measurement 7 8 two signal edge separation measurement 7 18 software 1 1 AI applications 4 21 AO applications 5 11 DIO...

Page 173: ...roubleshooting NI resources B 1 two signal edge separation measurement 7 17 buffered 7 18 single 7 18 types of analog triggers 11 3 U using PFI terminals as static digital I Os 8 5 as timing input sig...

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