Chapter 3
Hardware Overview
3-4
ni.com
Multiple-Tap Data Formatter
Many digital cameras transfer multiple taps, or channels, of data
simultaneously to increase the frame rate of the camera. However, the data
in each tap may not be transferred in the traditional top-left to bottom-right
direction. Also, the taps may not transfer data in the same direction.
The multiple-tap data formatting circuitry on the IMAQ 1426 can
reorder the data from up to three taps. The data from each tap can
be independently scanned either from left-to-right or right-to-left and
top-to-bottom or bottom-to-top.
Note
For your convenience, data reformatting instructions for these cameras have been
preprogrammed into the camera files.
SDRAM
The IMAQ 1426 has 16 MB of onboard high-speed synchronous dynamic
RAM (SDRAM). The IMAQ 1426 uses the onboard RAM as a FIFO buffer
to ensure a complete acquisition. Even when the data rate from the camera
exceeds PCI throughput, you can acquire without interruption until the
onboard RAM is full.
Trigger Control and Mapping Circuitry
The trigger control and mapping circuitry routes, monitors, and drives
the external and RTSI bus trigger lines. You can configure each line to start
an acquisition on a rising or falling edge and drive each line asserted or
unasserted, much like a digital I/O line. You also can map pulses from the
high-speed timing circuitry or many of the IMAQ 1426 status signals to
these trigger lines. Four RTSI bus triggers and four external triggers (all of
which are programmable for polarity and direction) are available for
simultaneous use.
Individually configure the four external triggers in MAX as single-ended
I/O lines or, alternatively, as isolated or RS-422 input only lines. You can
configure the four external triggers in any combination of single-ended I/O
or input only lines. Table 3-1 lists the configuration options available for
each trigger source.
