2-4
|
ni.com
Chapter 2
Hardware Overview
Parallel Poll Operation
According to IEEE 488, devices must respond to a parallel poll within 200 ns after the
Controller-In-Charge (CIC) asserts the Identify (IDY) message—Attention (ATN) and End or
Identify (EOI). The CIC waits at least 2 µs before reading the Parallel Poll Response (PPR). In
some cases, a remote device on an expanded system cannot respond to parallel polls this quickly
because of propagation delays across the expander and the longer cables.
When the GPIB-120B notices that a GPIB controller is conducting a parallel poll, it sends a
message to the secondary side to initiate a parallel poll. The parallel poll on the secondary side
is of the same duration as the poll on the primary side, but delayed by the time it takes to get the
message to the secondary side. In the GPIB-120B this time is approximately 400 ns. When the
poll on the primary side finishes, a message is sent to finish it on the secondary side, where the
poll finishes about 400 ns later. Therefore, if the secondary side of the GPIB-120B waited until
the end of its parallel poll to send the result of the poll to the primary side, it would be after the
primary side poll has ended. Thus the controller would miss the responses of the devices on the
secondary side.
To solve this problem, the secondary side of the GPIB-120B samples the state of the bus every
600 ns during parallel polls and sends that data back to the primary side. Therefore, taking the
start of the poll on the primary side as time 0, the state of the secondary bus is sent to the primary
side at times 600 ns, 1200 ns, 1800 ns and so on, and again when the poll actually ends.
For slow devices or topologies in which a device on the secondary bus responds to the parallel
poll after the last data packet was sent to the primary side, the controller would miss the response
from this device. If you encounter this situation, you must configure your controller to conduct
parallel polls longer than 2 µs.
