Chapter 3
Signal Connections
3-10
©
National Instruments Corporation
Example:
At power up, the device is configured for input and, by default, all DIO
lines are high. To pull one channel low, follow these steps:
1.
Install a load (R
L
). Remember that the smaller the resistance, the
greater the current consumption and the lower the voltage (V).
2.
Using the following formula, calculate the largest possible load to
maintain a logic low level of 0.4 V and supply the maximum driving
current (I).
V = I * R
L
⇒
R
L
= V / I, where:
V= 0.4 V is the voltage across R
L
I = 46
µ
A + 10
µ
A is the 4.6 V across the 100 k
Ω
pull-up
resistor and 10
µ
A from 82C55 leakage current
Therefore:
R
L
= 7.1 k
Ω
is the 0.4 V / 56
µ
A
This resistor value, 7.1 k
Ω
, provides a maximum of 0.4 V on the DIO line
at power up. You can substitute smaller resistor values, but they will draw
more current, leaving less drive current for other circuitry connected to this
line. The 7.1 k
Ω
resistor reduces the amount of a logic high source current
by 0.4 mA with a 2.8 V output.
Low DIO State
If you select pulled-low mode, each DIO line will be pulled to GND
(0 VDC) using a 100 k
Ω
resistor. If you want to pull a specific line high,
connect a pull-up resistor that gives you a minimum of 2.8 VDC. The DIO
lines are capable of sinking a maximum of 2.5 mA at 0.4 V in the low state.
Use the largest possible resistance value so that you do not use more current
than necessary to perform the pull-up task.
Also, make sure the pull-up resistor value is not so large that leakage
current from the DIO line along with the current from the 100 k
Ω
pull-down resistor brings the voltage at the resistor below a TTL-high level
of 2.8 VDC.
