Chapter 4
Signal Connections
6711/6713/6715 User Manual
4-18
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The maximum allowed frequency is 20 MHz, with a minimum pulse width
of 10 ns high or low. There is no minimum frequency limitation.
The 20 MHz or 100 kHz timebase normally generates the
GPCTR0_SOURCE signal unless you select some external source.
GPCTR0_GATE Signal
Any PFI pin can externally input the GPCTR0_GATE signal, which is
available as an output on the PFI9/GPCTR0_GATE pin.
As an input, the GPCTR0_GATE signal is configured in the edge-detection
mode. You can select any PFI pin as the source for GPCTR0_GATE and
configure the polarity selection for either rising or falling edge. You can use
the gate signal in a variety of different applications to perform actions such
as starting and stopping the counter, generating interrupts, saving the
counter contents, and so on.
As an output, the GPCTR0_GATE signal reflects the actual gate signal
connected to general-purpose counter 0. This is true even if the gate is
externally generated by another PFI. This output is set to tri-state at startup.
Figure 4-12 shows the timing requirements for the GPCTR0_GATE signal.
Figure 4-12.
GPCTR0_GATE Signal Timing in Edge-Detection Mode
GPCTR0_OUT Signal
This signal is available only as an output on the GPCTR0_OUT pin.
The GPCTR0_OUT signal reflects the terminal count (TC) of
general-purpose counter 0. You have two software-selectable output
options—pulse on TC and toggle output polarity on TC. The output
polarity is software selectable for both options. This output is set to tri-state
at startup. Figure 4-13 shows the timing of the GPCTR0_OUT signal.
Rising-edge
polarity
Falling-edge
polarity
t
w
t
w
= 10 ns minimum
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