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National Instruments 6612, User Manual

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Chapter 2

Digital I/O

Hardware-timed operations can be buffered or hardware-timed single point. A buffer is a 
temporary storage in computer memory for to-be-transferred samples.
•

Buffered

—Data is moved from the DAQ device’s onboard FIFO memory to a PC buffer 

using DMA before it is transferred to application memory. Buffered acquisitions typically 
allow for much faster transfer rates than non-buffered acquisitions because data is moved 
in large blocks, rather than one point at a time.
One property of buffered I/O operations is the sample mode. The sample mode can be either 
finite or continuous:
–

Finite sample mode acquisition refers to the acquisition of a specific, predetermined 
number of data samples. After the specified number of samples has been read in, the 
acquisition stops. If you use a reference trigger, you must use finite sample mode.

–

Continuous acquisition refers to the acquisition of an unspecified number of samples. 
Instead of acquiring a set number of data samples and stopping, a continuous 
acquisition continues until you stop the operation. Continuous acquisition is also 
referred to as double-buffered or circular-buffered acquisition.
If data cannot be transferred across the bus fast enough, the FIFO becomes full. New 
acquisitions will overwrite data in the FIFO before it can be transferred to host 
memory. The device generates an error in this case. With continuous operations, if the 
user program does not read data out of the PC buffer fast enough to keep up with the 
data transfer, the buffer could reach an overflow condition, causing an error to be 
generated.

•

Hardware-timed single point (HWTSP)

—Typically, HWTSP operations are used to read 

single samples at known time intervals. While buffered operations are optimized for high 
throughput, HWTSP operations are optimized for low latency and low jitter. In addition, 
HWTSP can notify software if it falls behind hardware. These features make HWTSP ideal 
for real time control applications. HWTSP operations, in conjunction with the wait for next 
sample clock function, provide tight synchronization between the software layer and the 
hardware layer. 
Refer to the document, 

NI-DAQmx Hardware-Timed Single Point Lateness Checking

, for 

more information. To access this document, go to 

ni.com/info

 and enter the Info Code 

daqhwtsp

.

Digital Input Triggering

Digital input supports three different triggering actions:
•

Start trigger

•

Reference trigger

•

Pause trigger

Refer to the 

DI Start Trigger Signal

, 

DI Reference Trigger Signal

, and 

DI Pause Trigger Signal

 

sections for information about these triggers.

Summary of Contents for 6612

Page 1: ...NI 6612 User Manual NI 6612 User Manual November 2013 374008B 01 ...

Page 2: ...sses and current events National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 For further support information refer to the Technical Support and Professional Services appendix To comment on National Instruments documentation refer to the National Instruments Web site at ni com info and enter the Info Code feedback 2013 National Instru...

Page 3: ... Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power fail...

Page 4: ...ENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN 2 IN ANY APPLICATION INCLUDING THE ABOVE RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY COMPUTER HARDWARE MALFUNCTIONS COMPUTER OPERATING SYSTEM SOFTWARE FITNESS FITNESS...

Page 5: ...mercial areas To minimize interference with radio and television reception and prevent unacceptable performance degradation install and use this product in strict accordance with the instructions in the product documentation Furthermore any modifications to the product not expressly approved by National Instruments could void your authority to operate it under your local regulatory rules Caution T...

Page 6: ...2 8 Routing DI Start Trigger to an Output Terminal 2 8 DI Reference Trigger Signal 2 8 Using a Digital Source 2 9 Routing DI Reference Trigger Signal to an Output Terminal 2 9 DI Pause Trigger Signal 2 9 Using a Digital Source 2 10 Routing DI Pause Trigger Signal to an Output Terminal 2 10 Digital Output Data Generation Methods 2 10 Software Timed Generations 2 10 Hardware Timed Generations 2 11 D...

Page 7: ...l Settings 3 2 Timing Settings 3 3 Trigger Settings 3 4 Other Settings 3 6 Exporting a Terminal Count Signal 3 6 Cascading Counters 3 6 Pulse Measurement 3 6 Create Channel 3 7 Channel Settings 3 7 Timing Settings 3 8 Trigger Settings 3 9 Other Settings 3 10 Semi Period Measurement 3 10 Settings 3 10 Frequency Measurement 3 11 Frequency Measurement Considerations 3 11 Frequency Measurement Methods...

Page 8: ... 3 32 Channel Settings 3 33 Timing Settings 3 33 Triggering Setting 3 33 Generating a Waveform with Variable Frequency and Duty Cycle 3 34 Create Channel 3 34 Channel Settings 3 35 Timing Settings 3 35 Triggering Settings 3 35 Buffer Considerations 3 35 Generating Complex Digital Waveform or Timing Pattern 3 36 Create Channel 3 36 Channel Settings 3 36 Timing Settings 3 37 Triggering Setting 3 37 ...

Page 9: ... 5 Matching Routing Terminology 5 5 Synchronizing Multiple Devices 5 6 PXI Express Devices 5 6 PCI Express Devices 5 7 Real Time System Integration RTSI 5 7 Using RTSI as Outputs 5 8 Using RTSI Terminals as Timing Input Signals 5 8 RTSI Filters 5 9 PXI Trigger Signals NI PXIe 6612 Only 5 9 PXI_Trigger 0 7 5 9 PXI_STAR 5 9 PXIe DSTAR A C 5 10 Chapter 6 Bus Interface Data Transfer Methods 6 1 PCI Ex...

Page 10: ...NI 6612 User Manual National Instruments xi Appendix B Technical Support and Professional Services ...

Page 11: ...that the device is operating properly NI 6612 Specifications Contains specifications specific to the NI 6612 NI DAQmx Help Contains API overviews general information about measurement concepts key NI DAQmx concepts and common applications that are applicable to all programming environments NI DAQmx is the software you use to communicate with and control your DAQ device Select Start All Programs Na...

Page 12: ...tion instructions that accompany your software 2 Installing NI DAQmx The DAQ Getting Started documents contain step by step instructions for installing software and hardware configuring channels and tasks and getting started developing an application 3 Installing the hardware The DAQ Getting Started documents describe how to install PCI Express and PXI Express devices as well as accessories and ca...

Page 13: ...8 conductor cable R6868 Unshielded 68 conductor flat ribbon cable BNC 2121 BNC connector block with built in test features CA 1000 Configurable connector accessory SCB 68A Shielded screw connector block TBX 68 Unshielded DIN rail connector block CB 68LP Unshielded low cost screw connector block CB 68LPR Unshielded low cost screw connector block NI PXIe 6612 only TB 2715 Front mount terminal block ...

Page 14: ...ed for timing input or output it is called PFI x where x is a number between 0 and 39 representing the PFI line number The same physical pin has two different names depending on whether it is used for digital I O Px y or timing I O PFI x For example the digital I O line P1 3 is the same physical pin as the timing I O signal PFI 35 Refer to Appendix A Pinout and Signal Descriptions for a complete p...

Page 15: ...xcept for the default counter source input pins CI is not populated on the default source input pins in order to allow the measurement of higher speed input signals Table 2 2 lists the lines that do not populate CI You must use the lines in Table 2 2 when measuring inputs frequencies above 25 MHz For more information refer to the NI 6612 Specifications DO Sample Clock DO Waveform Generation FIFO D...

Page 16: ...gle sample of data Each of the DIO lines can be used as a static DI or DO line You can use static DIO lines to monitor or control digital signals Each DIO can be individually configured as a digital input DI or digital output DO All samples of static DI lines and updates of static DO lines are software timed Hardware Timed Acquisitions With hardware timed acquisitions a digital hardware signal di ...

Page 17: ... transferred across the bus fast enough the FIFO becomes full New acquisitions will overwrite data in the FIFO before it can be transferred to host memory The device generates an error in this case With continuous operations if the user program does not read data out of the PC buffer fast enough to keep up with the data transfer the buffer could reach an overflow condition causing an error to be g...

Page 18: ...tal input timing signals are featured DI Sample Clock Signal DI Sample Clock Timebase Signal DI Start Trigger Signal DI Reference Trigger Signal DI Pause Trigger Signal Signals with an support digital filtering Refer to the PFI Filters section of Chapter 4 PFI for more information DI Sample Clock Signal The device uses the DI Sample Clock di SampleClock signal to sample the Port 0 terminals and st...

Page 19: ... generates DI Sample Clock unless you select some external source DI Start Trigger starts this timing engine and either software or hardware can stop it after a finite acquisition completes When using the DI timing engine you also can specify a configurable delay from DI Start Trigger to the first DI Sample Clock pulse By default this delay is set to two ticks of the DI Sample Clock Timebase signa...

Page 20: ...ain number of points are sampled in finite mode After a hardware reference trigger in finite mode With a software command in continuous mode An acquisition that uses a start trigger but not a reference trigger is sometimes referred to as a posttriggered acquisition Retriggerable DI The DI Start Trigger can also be configured to be retriggerable The timing engine generates samples and converts cloc...

Page 21: ...rence Trigger in a pretriggered acquisition operation DI Reference Trigger Signal Use the DI Reference Trigger di ReferenceTrigger signal to stop a measurement acquisition To use a reference trigger specify a buffer of finite size and a number of pretrigger samples samples that occur before the reference trigger The number of posttrigger samples samples that occur after the reference trigger desir...

Page 22: ... the measurement acquisition stops on the rising or falling edge of DI Reference Trigger Routing DI Reference Trigger Signal to an Output Terminal DI Reference Trigger can be routed out to any PFI 0 39 RTSI 0 7 PXI_Trig 0 7 or PXIe DSTARC terminal All PFI terminals are configured as inputs by default DI Pause Trigger Signal The DI Pause Trigger di PauseTrigger signal can be used to pause and resum...

Page 23: ...ve to the level of the source not the edge Digital Output Data Generation Methods When performing a digital waveform operation either software timed or hardware timed generations can be performed Software Timed Generations With a software timed generation software controls the rate at which data is generated Software sends a separate command to the hardware to initiate each update In NI DAQmx soft...

Page 24: ...d from a PC buffer to the device s onboard FIFO using DMA before it is written to the output lines one sample at a time Buffered generation typically allow for much faster transfer rates than non buffered acquisitions because data is moved in large blocks rather than one point at a time One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous Fi...

Page 25: ...gital Waveform Generation Digital waveforms can be generated on the Port 0 DIO lines The DO waveform generation FIFO stores the digital samples NI 6612 has a DMA controller dedicated to moving data from the system memory to the DO waveform generation FIFO The device moves samples from the FIFO to the DIO terminals on each rising or falling edge of a clock signal DO Sample Clock Each DIO signal is ...

Page 26: ...ed to an external source DO Start Trigger starts the timing engine and either the software or hardware can stop it after a finite generation completes When using the DO timing engine a configurable delay can be configured from DO Start Trigger to the first DO Sample Clock pulse By default this delay is two ticks of DO Sample Clock Timebase Figure 2 8 shows the relationship of DO Sample Clock to DO...

Page 27: ...e DO Start Trigger signal while the clock generation is in progress After the clock generation is finished the timing engine waits for another start trigger to begin another clock generation Figure 2 9 shows a retriggerable DO of four samples Figure 2 9 Retriggerable DO Using a Digital Start Trigger To use DO Start Trigger specify a source and an edge You can route many signals to DO Start Trigger...

Page 28: ...th the Onboard Clock Source When using any signal other than the onboard clock as the source of your sample clock the generation resumes as soon as the pause trigger is deasserted and another edge of the sample clock is received as shown in Figure 2 11 Figure 2 11 DO Pause Trigger with Other Signal Sources Using a Digital Pause Trigger To use DO Pause Trigger specify a source and a polarity You ca...

Page 29: ... output limits of the DAQ device NI has several signal conditioning solutions for digital applications requiring high current drive When configuring a PFI or DIO line as an input do not drive the line with voltages outside of its normal operating range Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device ...

Page 30: ...detection circuitry can interrupt a user program when one of several DIO signals changes state You also can use the output of the DIO change detection circuitry to trigger a DI or counter acquisition on the logical OR of several digital signals By routing the Change Detection Event signal to a counter the relative time between bus changes can be captured The Change Detection Event signal can be us...

Page 31: ...itter all lines in the bus will hold state until the bus becomes stable However each individual line only waits one extra filter tick before changing This prevents a noisy line from holding a valid transition indefinitely If all the bus line transitions become stable in less than one filter clock period and the bus period is more than two filter clock periods then all the bus lines are guaranteed ...

Page 32: ...propagates on the second filtered clock edge as shown in Figure 2 14 Figure 2 14 Case 1 Case 2 If an additional line on the bus also has a transition during the filter clock period the change is not propagated until the next filter clock edge as shown in Figure 2 15 Figure 2 15 Case 2 Digital Input P0 A Digital Input P0 B Filter Clock Filtered Input A Filtered Input B Stable Stable Stable Digital ...

Page 33: ... include receiving TTL signals and sensing external device states such as the state of the switch shown in the figure Digital output applications include sending TTL signals and driving external devices such as the LED shown in the figure 2A With line filtering filtered input A would ignore the glitch on digital input P0 B and transition after two filter clocks 3A Filtered input A goes high when s...

Page 34: ...ons Static digital input Static digital output Digital waveform generation Digital waveform acquisition DI change detection Note For more information about programming digital I O applications and triggers in software refer to the NI DAQmx Help or the LabVIEW Help The device uses the NI DAQmx driver NI DAQmx includes a collection of programming examples to help you get started developing an applic...

Page 35: ...C examples refer to the KnowledgeBase document Where Can I Find NI DAQmx Examples by going to ni com info and entering the Info Code daqmxexp For additional examples refer to zone ni com Signal Integrity Considerations Refer to the Signal Integrity Considerations section in Chapter 4 PFI for more information ...

Page 36: ...s and generations The embedded counters cannot be programmed independent of the main counter and signals from the embedded counters are not routable Counter measurements support several options for determining when each measurement is taken For example you can configure the counter to take a measurement on each edge of a sample clock For measurements using a sample clock you must configure the NI ...

Page 37: ...surement Pulse Width Measurement Two Edge Separation Edge Counting In an Edge Counting measurement task the counter counts the number of active edges of a signal Figure 3 2 shows an example of edge counting Figure 3 2 Edge Counting Channel Settings By default the counter starts the count at 0 counts edges on a default PFI terminal Refer to Chapter 5 Counter Signal Routing and Clock Generation for ...

Page 38: ... via CI CountEdges DirTerm Timing Settings The timing settings determine when the device reads the count value On Demand By default the counter uses On Demand no sample clock timing The counter starts counting when software calls DAQmx Start Task Each time you call DAQmx Read the counter returns the current count value Figure 3 3 shows an example using On Demand timing Figure 3 3 Edge Counting On ...

Page 39: ...n change these behaviors by configuring DAQmx Trigger properties Using an Arm Start Trigger Use an Arm Start Trigger to have the counter begin counting in response to a hardware trigger 1 Set ArmStart TrigType to Digital Edge 2 Set ArmStart DigEdge Src to select what signal to use as the ArmStartTrigger 3 Set ArmStart DigEdge Edge to select the rising or falling edge of the signal Figure 3 5 shows...

Page 40: ... a hardware signal set the following DAQmx Channel properties 1 Set CI CountEdges CountReset Enable to True 2 Set CI CountEdges CountReset Term to select the signal that causes the count to reset 3 Set CI CountEdges CountReset ActiveEdge to select whether the rising or falling edge of the signal causes a reset 4 Set CI CountEdges ResetCnt to the value to change the count to in response to the sign...

Page 41: ...tEvent OutputBehavior CtrOutEvent Pulse Polarity and CtrOutEvent Toggle IdleState Cascading Counters You can cascade two counters to make a single 64 bit counter For example assuming that you want to use counter 5 and counter 6 to make a 64 bit counter configure the following 1 Set counter 5 to count edges 2 Route the signal to measure to counter 5 3 Configure counter 6 to count edges 4 Route the ...

Page 42: ...ttings By default the counter measures the pulse on a default PFI terminal Refer to Chapter 5 Counter Signal Routing and Clock Generation for more information begins measuring on a rising edge That is the counter measures the pulse high time first then the low time You can change these behaviors by configuring the following DAQmx Channel properties The signal to measure comes from an input termina...

Page 43: ... DAQmx Start Task 2 The device measures the first full pulse on the signal to measure 3 The device waits until you call DAQmx Read The device ignores the signal to measure while waiting 4 The device returns the measurement 5 The device then measures the next full pulse on the signal to measure 6 Steps 3 4 and 5 are repeated Implicit With Implicit timing the device measures the high and low time of...

Page 44: ... DAQmx Start Task You can change this behavior by setting DAQmx Trigger properties To have the counter begin counting in response to a hardware trigger use an Arm Start Trigger 1 Set ArmStart TrigType to Digital Edge 2 Set ArmStart DigEdge Src to select which signal to use as an ArmStartTrigger 3 Set ArmStart DigEdge Edge to select the rising or falling edge of the signal Figure 3 11 shows an exam...

Page 45: ...ware both measurements are the same however data is returned with a different alignment In a Pulse measurement each pair of high and low times is returned as one point of data each point of data consists of both the high time and low time Figure 3 9 shows an example of Pulse measurement In a Semi Period measurement the high and low times are returned as separate points Figure 3 12 shows an example...

Page 46: ...a measurement duration of 100 µs measure the time t it takes to observe a specified number of periods p Figure 3 14 shows an example with a measurement duration of three periods In both cases the frequency f is given by Figure 3 13 Frequency Measurement Using Time Table 3 1 Frequency Measurement Methods Method Timing Number of Counters Measurement Duration Sample Clock with Averaging Sample Clock ...

Page 47: ... implicit timing and specify a number of periods to measure the device returns the measurement after that number of periods of the input signal Note that the time to return a measurement depends on the unknown frequency of the input signal If the input signal is at a low frequency the device will take a long time to return a measurement Number of Counters Some methods use two of the eight counters...

Page 48: ...e number of samples sample clock source and other properties CI Freq EnableAveraging Set this property to True By default the counter measures the frequency on a default PFI terminal refer to Chapter 5 Counter Signal Routing and Clock Generation for more information and use an onboard 100 MHz clock as the timebase To change the signals used for this measurement configure the following CI Freq Term...

Page 49: ... following DAQmx Create channel CI Frequency Use this VI or function to create the channel DAQmx Timing Sample Clock Use this VI or function to set the number of samples samples clock source and other properties CI Freq EnableAveraging Set this property to False By default the counter measures the frequency on a default PFI terminal refer to Chapter 5 Counter Signal Routing and Clock Generation fo...

Page 50: ...e this VI or function to create the channel CI Freq MeasMeth Set this property to Low Frequency with 1 Counter By default the counter measures the frequency on a default PFI terminal refer to Chapter 5 Counter Signal Routing and Clock Generation for more information and use an onboard 100 MHz clock as the timebase To change the signals used for this measurement configure the following CI Freq Term...

Page 51: ...lue and uses the known frequency of the timebase fk to calculate the frequency fx of the signal to measure as Figure 3 18 Frequency Measurement Large Range of Frequencies with Two Counters With N as the integer that divides down the input signal fx which can be configured in CI Freq Div the maximum error and maximum frequency error for this method are given by fx fk T1 T2 Source Out Counter N Sour...

Page 52: ...Hz clock as the timebase To change the signals used for this measurement configure the following CI Freq Term The signal to measure comes from an input terminal To change the signal to measure set this property to a different terminal CI CtrTimebase Src To change the signals used as the counter timebase set this property to a different terminal High Frequency with 2 Counters This measurement metho...

Page 53: ...lowing DAQmx Create channel CI Frequency Use this VI or function to create the channel CI Freq MeasMeth Set this property to High Frequency with 2 Counters Note that this measurement method requires two counters Counter 0 paired with Counter 1 Counter 2 paired with Counter 3 Counter 4 paired with Counter 5 Counter 6 paired with Counter 7 Pulse Pulse 1 2 P T Source Out Counter M Source Gate Counter...

Page 54: ... for Period measurements are similar to Frequency measurements For example use CI Period Term to change the signal to measure Pulse Width Measurement Note This section describes Pulse Width measurements For Pulse measurements refer to the Pulse Measurement section In a Pulse Width measurement task the counter measures the duration of a pulse on a signal Figure 3 20 shows an example of a Pulse Widt...

Page 55: ...terminal CI PulseWidth StartingEdge Specifies on which edge rising or falling to begin the measurement CI PulseWidth Units Specifies the units of the measurement Timing Settings The timing settings determine when the device measures the signal Figure 3 20 shows an example of On Demand timing On Demand No Sample Clock By default the counter uses On Demand timing The following sequence of events des...

Page 56: ...Figure 3 22 shows an example of Sample Clock timing Figure 3 22 Pulse Width Measurement Sample Clock To use Sample Clock timing use the DAQmx Timing Sample Clock VI or function Trigger Settings By default the counter begins measuring when software calls DAQmx Start Task You can change this behavior by setting DAQmx Trigger properties To have the counter begin counting in response to a hardware tri...

Page 57: ... input to the counter by enabling a filter Refer to the PFI Filters section in Chapter 4 PFI for more information If you route the same PFI signal to multiple destinations you should enable the Synchronization feature Refer to Chapter 4 PFI for more information Two Edge Separation In a Two Edge Separation measurement task the counter measures the time between two events The beginning event is an a...

Page 58: ... Second Edge Specifies on which edge of the second signal rising or falling the device ends the measurement CI TwoEdgeSep Units Specifies the units of the measurement Timing Settings The timing settings determine when the device measures the signal Figure 3 24 shows an example of On Demand timing On Demand No sample clock By default the counter uses On Demand timing The following sequence of event...

Page 59: ...use Sample Clock timing use the DAQmx Timing Sample Clock VI or function Trigger Settings By default the counter begins measuring when software calls DAQmx Start Task You can change this behaviors by setting DAQmx Trigger properties To have the counter begin measuring in response to a hardware trigger use an Arm Start Trigger 1 Set ArmStart TrigType to Digital Edge 2 Set ArmStart DigEdge Src to se...

Page 60: ...drature cycle the counter increments When channel B leads channel A in a quadrature cycle the counter decrements The amount of increments and decrements per cycle depends on the type of encoding X1 X2 or X4 X1 Encoding Figure 3 27 shows a quadrature cycle and the resulting increments and decrements for X1 encoding When channel A leads channel B the increment occurs on the rising edge of channel A ...

Page 61: ...o channels A and B You must then ensure that channel Z is high during at least a portion of the phase you specify for reload In Figure 3 30 the reload phase is when both channel A and channel B are low The reload occurs when this phase is true and channel Z is high Incrementing and decrementing takes priority over reloading Thus when the channel B goes low to enter the reload phase the increment o...

Page 62: ...y the following parameters Decoding Type For two pulse encoders set this to Two Pulse Counting For quadrature encoders set this to XI X2 or X4 decoding Z index enables z index phase z index value If the encoder has a z output set z index enable to True Set the z index phase to indicate when to reset the counter Set z index value to indicate the value to reset the counter to Pulses per revolution I...

Page 63: ...emand Timing Sample Clock To precisely control when the device reads the encoder use the DAQmx Timing Sample Clock VI or function With this VI or function you can set the source and rate of the Sample Clock and the number of samples to acquire On each sample clock the device stores the current count value in a buffer Use DAQmx Read to read the values from this buffer Figure 3 33 shows an example o...

Page 64: ...FI for more information Linear Position Measurement In a linear position measurement task the counter measures position using a quadrature encoder or two pulse encoder Linear position measurements are similar to Angular position measurements The main difference is that DAQmx can return the measurement in units of meters or inches instead of degrees or radians To make an angular measurement first c...

Page 65: ...signal begins in a low IdleState The pulse generation begins by calling the Start Task VI or function After waiting for InitialDelay seconds the output goes high for HighTime seconds and then low for LowTime seconds The output then goes high and low again until the desired number of pulses have been generated The second waveform shows an example where the IdleState is high Ticks A tick is one peri...

Page 66: ...ion The NI 6612 can also begin generating pulses in response to a digital trigger Figure 3 36 shows an example using a digital trigger Figure 3 36 Start Trigger Initiates Pulse Generation To use a start trigger call the DAQmx Start Trigger Digital Edge VI or function Inputs to this VI or function include Source Specifies which terminal to use as the Start Trigger signal Edge Specifies a rising or ...

Page 67: ...rm with Constant Frequency and Duty Cycle Create Channel You specify the characteristics of the waveform when you create the channel You can specify in terms of frequency and duty cycle time or ticks Frequency and Duty Cycle To specify the waveform in terms of frequency and duty cycle use the DAQmx Create Channel CO Pulse Generation Frequency VI or function Time To specify the waveform in terms of...

Page 68: ...enerated in response to a digital trigger Figure 3 39 Start Trigger Initiates Waveform Generation To use a start trigger call the DAQmx Start Trigger Digital Edge VI or function Inputs to this VI or function include Source Specifies which terminal to use as the Start Trigger signal Edge Specifies a rising or falling edge The following DAQmx Trigger properties configure the Start Trigger Start Dela...

Page 69: ...g the current pulse idle and active level before beginning the new waveform frequency duty cycle You can specify the waveform buffer in terms of Frequency and duty cycle Idle time and active time of each pulse Idle ticks and active ticks of each pulse A tick is one period of the counter timebase by default 10 ns Create Channel Use one of the following functions to create a channel Select the VI or...

Page 70: ...igger signal Edge Specifies rising or falling edges The following DAQmx Trigger properties configure the Start Trigger Start Delay Start DelayUnits Specifies the delay from when the trigger occurs to when the NI 6612 begins generating pulses Note Even if the Start Delay is set to 0 the NI 6612 inserts a minimum delay equal to two ticks of the counter timebase Start DigEdge DigFltr Enable Start Dig...

Page 71: ...of the timebase clock 10 ns by default Frequency and duty cycle Create Channel Use one of the following functions to create a channel Select the VI or function that corresponds to the format of the data in the waveform buffer DAQmx Create Channel CO Pulse Generation Time DAQmx Create Channel CO Pulse Generation Ticks DAQmx Create Channel CO Pulse Generation Frequency Channel Settings By default th...

Page 72: ...gFltr Enable Start DigEdge DigFltr MinPulseWidth To enable and configure a digital filter on the start trigger input This filter eliminate noise on the start trigger signal Refer to Chapter 4 PFI for more information Buffer Considerations DAQmx supports configuring and using the waveform buffer in different ways to support a wide variety of applications For example you can configure DAQmx to read ...

Page 73: ...e 3 42 Frequency Generator Circuitry The Frequency Generator can use one of three timebases 20 MHz 10 MHz or 100 kHz The timebase can be divided by any integer from 1 to 16 to create the FREQ OUT signal Create a virtual channel using the DAQmx Create Channel CO Pulse Generation Frequency VI or function Choose device name freqout for the counter input to this VI or function Set the frequency input ...

Page 74: ...I line Each PFI line is similar Figure 4 1 PFI Circuitry When a terminal is used as a timing input or output signal it is called PFI x where x is an integer from 0 to 39 When a terminal is used as a static digital input or output it is called P0 x or P1 x On the I O connector each terminal is labeled PFI x P0 x or PFI x P1 x The voltage input and output levels and the current drive levels of the P...

Page 75: ...uts and whether the input is edge or level sensitive Exporting Timing Output Signals Using PFI Terminals You can route any of the following timing signals to any PFI terminal configured as an output DI Sample Clock di SampleClock DI Start Trigger di StartTrigger DI Reference Trigger di ReferenceTrigger DI Pause Trigger di PauseTrigger DO Sample Clock do SampleClock DO Start Trigger do StartTrigger...

Page 76: ...functionality inside the device Refer to the DI Change Detection section of Chapter 2 Digital I O for more information Connecting PFI Input Signals All PFI input connections are referenced to D GND Figure 4 2 shows this reference and how to connect an external PFI 0 source and an external PFI 2 source to two PFI terminals Figure 4 2 PFI Input Signal Connections PFI Filters You can enable a program...

Page 77: ...o high transition on an input that has a custom filter set to N 5 Figure 4 3 Filter Example Enabling filters introduces jitter on the input signal The maximum jitter is one period of the timebase When a RTSI or PXI_Trig input is routed directly to PFI the device does not use the filtered version of the input signal Table 4 1 Filters Filter Setting Filter Clock N Filter Clocks Needed to Pass Signal...

Page 78: ...perly ground yourself and the equipment when handling the DAQ device or connecting to it Signal Integrity Considerations Signal integrity can be optimized by maintaining a common and matched impedance across your entire system The NI 6612 output impedance is 75 Ω The SH68 68 D1 cable is also approximately 75 Ω When connecting signals to the NI 6612 this impedance needs to be matched as closely as ...

Page 79: ...nnect your GND signal to the appropriate GND pin as shown in this table If you are using the BNC 2121 simply connect your GND signal to the nearest GND pin Table 4 2 Signals and D GND Pin Number on 68 Pin Screw Terminal Accessory PFI DIO Number Pin Number for D GND PFI 0 P0 0 11 PFI 1 P0 1 PFI 2 P0 2 46 PFI 3 P0 3 PFI 4 P0 4 14 PFI 5 P0 5 PFI 6 P0 6 49 PFI 7 P0 7 PFI 8 P0 8 50 PFI 9 P0 9 PFI 10 P0...

Page 80: ...P0 23 PFI 24 P0 24 30 PFI 25 P0 25 PFI 26 P0 26 65 PFI 27 P0 27 PFI 28 P0 28 33 PFI 29 P0 29 PFI 30 P0 30 68 PFI 31 P0 31 PFI 32 P1 0 42 PFI 33 P1 1 39 PFI 34 P1 2 42 PFI 35 P1 3 41 PFI 36 P1 4 39 PFI 37 P1 5 41 PFI 38 P1 6 36 PFI 39 P1 7 Table 4 2 Signals and D GND Pin Number on 68 Pin Screw Terminal Accessory Continued PFI DIO Number Pin Number for D GND ...

Page 81: ...our system through RTSI User input through the PXI_Star terminal Clocking circuitry Clock Routing Figure 5 1 shows the clock routing circuitry of an NI 6612 device Figure 5 1 Clock Routing Circuitry PXI_Trigger 0 7 Onboard 100 MHz Oscillator External Reference Clock To RTSI 0 7 PXI_Trigger 0 7 PFI 0 39 Output Selectors 10 MHz RefClk PLL 5 200 DAQmx Timing Property RefClk Src PXIe_CLK100 PXI_STAR 1...

Page 82: ... the 20 MHz Timebase by 200 External Reference Clock The external reference clock can be used as a source for the internal timebases 100 MHz Timebase 20 MHz Timebase and 100 kHz Timebase on your device By using the external reference clock you can synchronize the internal timebases to an external clock The following signals can be routed to drive the external reference clock RTSI 0 7 PFI 0 39 PXI_...

Page 83: ...ple modules in a PXI Express measurement or control system The PXIe backplane is responsible for generating PXIe_CLK100 independently to each peripheral slot in a PXI Express chassis For more information refer to the PXI Express Specification at www pxisa org PXIe_SYNC100 NI PXIe 6612 Only PXIe_SYNC100 is a common low skew 10 MHz reference clock with a 10 duty cycle for synchronization of multiple...

Page 84: ... Frequency with One Counter Period Frequency High Frequency with Two Counters or Large Range with Two Counters PFI 39 PFI 35 PFI 31 PFI 27 PFI 23 PFI 19 PFI 15 PFI 11 Two Edge Separation Start PFI 37 PFI 33 PFI 29 PFI 25 PFI 21 PFI 17 PFI 13 PFI 9 Stop PFI 38 PFI 34 PFI 30 PFI 26 PFI 22 PFI 18 PFI 14 PFI 10 Position A PFI 39 PFI 35 PFI 31 PFI 27 PFI 23 PFI 19 PFI 15 PFI 11 B PFI 37 PFI 33 PFI 29 P...

Page 85: ...ck the Device Routes tab at the bottom of the middle pane to see routes that can be made within your device Matching Routing Terminology NI DAQmx and the Device Routes table in MAX use different terminology for counter signals The counters each have the following inputs Source Gate Aux HW Arm A B Z Sample Clock MAX uses these names However the counter inputs have different functions depending on w...

Page 86: ...e Pause Trigger Synchronizing Multiple Devices Refer to the following sections for information about synchronizing multiple NI 6612 devices PXI Express Devices On PXI Express systems you can synchronize devices to PXIe_CLK100 In this application the PXI Express chassis acts as the initiator Each PXI Express module routes PXIe_CLK100 to its external reference clock Another option in PXI Express sys...

Page 87: ...se to drive the timing engine on multiple devices Share trigger signals between devices Many National Instruments DAQ motion vision and CAN devices support RTSI In a PCI Express system the RTSI bus consists of the RTSI bus interface and a ribbon cable The bus can route timing and trigger signals between several functions on as many as five DAQ vision motion or CAN devices in the computer In a PXI ...

Page 88: ...al Output Change Detection Event FREQ OUT PFI 0 39 Note Signals with a are inverted before being driven on the RTSI terminals Using RTSI Terminals as Timing Input Signals You can use RTSI terminals to route external timing signals to many different NI 6612 functions Each RTSI terminal can be routed to any of the following signals Counter input signals for all counters Source Gate Aux HW_Arm A B or...

Page 89: ...ween PXI trigger signals and the DI DO Counter and Clocking systems Use DAQmx properties to configure the desired routes To see a complete list of available routes use the device routes table for your device in MAX Refer to the Routing Options section for more information Each PXI trigger signal has a programmable debounce filter that can eliminate noise on input signals Refer to the PFI Filters s...

Page 90: ...le you to create more applications because of the increased routing capabilities Table 5 5 describes the three differential star DSTAR lines and how they are used For more information refer to the PXI Express Specification at www pxisa org Table 5 5 PXIe DSTAR Line Descriptions Trigger Line Purpose PXIe DSTARA Distributes high speed high quality clock signals from the system timing slot to the per...

Page 91: ...A hardware and software technology to achieve high throughput rates and increase system utilization DMA is the default method of data transfer for PCI Express and PXI Express devices NI 6612 devices have ten fully independent DMA controllers for high performance transfers of data blocks One DMA controller is available for each measurement and acquisition block Counter 0 Counter 1 Counter 2 Counter...

Page 92: ...ansferring data Each read or write call in the program initiates the transfer of data Programmed I O is typically used in software timed on demand operations PXI Express Considerations PXI Express Clock and Trigger Signals Refer to the PXI Trigger Signals NI PXIe 6612 Only section of Chapter 5 Counter Signal Routing and Clock Generation for more information about PXI and PXI Express clock and trig...

Page 93: ... National Instruments 7 1 7 Calibration For the NI 6612 calibration is not required ...

Page 94: ...nal Instruments A 1 A Pinout and Signal Descriptions Figure A 1 shows the NI PCIe PXIe 6612 pinout The descriptions beside each pin are in the following format Signal Name DIO Context Counter Context Default ...

Page 95: ...9 P0 19 CTR 5 SOURCE PFI 20 P0 20 CTR 4 OUT D GND PFI 23 P0 23 CTR 4 SOURCE PFI 24 P0 24 CTR 3 OUT D GND PFI 27 P0 27 CTR 3 SOURCE PFI 28 P0 28 CTR 2 OUT D GND PFI 31 P0 31 CTR 2 SOURCE R GND RESERVED RESERVED PFI 37 P1 5 CTR 0 AUX D GND D GND R GND D GND D GND PFI 1 P0 1 PFI 2 P0 2 D GND PFI 5 P0 5 PFI 6 P0 6 D GND D GND PFI 10 P0 10 CTR 7 GATE PFI 11 P0 11 CTR 7 SOURCE PFI 12 P0 12 CTR 6 OUT PFI...

Page 96: ...Service Program SSP with the purchase of most software products and bundles including NI Developer Suite NI also offers flexible extended contract options that guarantee your SSP benefits are available without interruption for as long as you need them Visit ni com ssp for more information For information about other technical support options in your area visit ni com services or contact your local...

Page 97: ...ort and Professional Services You also can visit the Worldwide Offices section of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresses and current events ...

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