1.MAIN_TOP (1/7)
9
HDMII_MCLK
HDMII_SCK
HDMII_LRCK
HDMII_D0
HDMII_D1
HDMII_D2
HDMII_D3
USB_LRCK
USB_SCK
USB_SD1
SDA2
SCL2
USB_GPIO0
USB_GPIO1
USB_GPIO2
USB_GPIO3
U_M51_MAIN_USB_VM1_0
M51_MAIN_USB_VM1_0.SchDoc
SDA0
SPINT
SPERR
SCL0
SPBCK
SPDO
SPFS
HDMI_SP
U_M51_MAIN_SPDIF_VM1_0
M51_MAIN_SPDIF_VM1_0.SchDoc
ZSPISS
ZSPIDATA
ZSPICK
ZRST
ZINT
SCL1
SDA1
INT_TX
INT2_RX
INT_RX
SCL2
SDA2
SCL0
SDA0
SPINT
SPERR
USB_GPIO0
USB_GPIO1
USB_GPIO2
USB_GPIO3
M_MUTE
MUTEVA
SPI_MISO
SPI_MOSI
SPI_CS
SPI_SCK
DUT_RESET
PWRDNB
STBY
U_M51_MAIN_MCU_VM1_0
M51_MAIN_MCU_VM1_0.SchDoc
HDMII_MCLK
HDMII_SCK
HDMII_LRCK
HDMII_D0
HDMII_D1
HDMII_D2
HDMII_D3
HDMII_SP
SPI_MISO
SPI_MOSI
SPI_CS
SPI_SCK
SCL1
SDA1
INT_TX
INT2_RX
INT_RX
HD_SD0
HD_WS
HD_SCK
DUT_RESET
PWRDNB
U_M51_MAIN_HDMI_VM10
M51_MAIN_HDMI_VM1_0.SchDoc
CH1_REF0
CH1_REF1
CH1_REF2
USB_LRCK
USB_SCK
USB_SD1
HD_SD0
HD_WS
HD_SCK
SP_SCK
SP_SD
ZSPISS
ZSPIDATA
ZSPICK
ZRST
ZINT
CH0_REF0
CH0_REF1
CH0_REF2
CH3_REF0
CH3_REF1
CH3_REF2
CH2_REF0
CH2_REF1
CH2_REF2
CH5_REF0
CH5_REF1
CH5_REF2
CH4_REF0
CH4_REF1
CH4_REF2
CH7_REF0
CH7_REF1
CH7_REF2
CH6_REF0
CH6_REF1
CH6_REF2
SP_LRCK
MUTEVA
844kHz
U_M51_MAIN_DDFA1_VM1_0
M51_MAIN_DDFA1_VM1_0.SchDoc
CH1_REF0
CH1_REF1
CH1_REF2
CH0_REF0
CH0_REF1
CH0_REF2
CH3_REF0
CH3_REF1
CH3_REF2
CH2_REF0
CH2_REF1
CH2_REF2
CH5_REF0
CH5_REF1
CH5_REF2
CH4_REF0
CH4_REF1
CH4_REF2
CH7_REF0
CH7_REF1
CH7_REF2
CH6_REF0
CH6_REF1
CH6_REF2
M_MUTE
STBY
844kHz
U_M51_MAIN_AUDIO_OPAVM1_0
M51_MAIN_AUDIO_OPAVM1_0.SchDoc
CIRCUIT DIAGRAMS
Summary of Contents for C 510
Page 1: ...NAD SERVICE MANUAL C510 C510 Direct Digital DAC Direct Digital DAC...
Page 18: ...1 MAIN BOARD 18 PCB LAYOUT Top Larer Bottom Layer...
Page 19: ...2 TRIGGER BOARD 19 Top Layer Bottom Layer 3 SMPS BOARD Top Layer Bottom Layer...
Page 20: ...4 FPP BOARD 20 Top Larer Bottom Layer...
Page 21: ...5 VFD AND ENCODE BOARD 21 Top Larer Bottom Layer...
