MSC C6-MB-EVA
- PRELIMINARY -
User Manual
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4.26
Serial I2C-Bus EEPROM
For testing purposes two serial EEPROM (4kBit) are connected to the I2C bus. To avoid address
conflicts, the address can be selected with jumpers.
4.26.1 Feature I2C EEPROM
JP2501
Signal name
Function
Default resistor setting
1 - 2
A0
A0 low
high
3 - 4
A1
A1 low
high
5 - 6
A2
A2 low
high
Table 39 Jumper Feature I2C EEPROM Address
4.26.2 User I2C EEPROM
JP2502
Signal name
Function
Default resistor setting
1 - 2
A0
A0 low
high
3 - 4
A1
A1 low
high
5 - 6
A2
A2 low
high
Table 40 Jumper User I2C EEPROM Address
Note: The 10k pull up resistor at A2 is missing on rev. 3 carriers (LY30E801).
4.27
External SPI BIOS-Flash
There is a socket on the mother board, where an additional BIOS-Flash can be inserted. The
BIOS SPI flash can be selected with DIP switch S2901.
BIOS_DIS1
BIOS_DIS0 BIPOS Entry (SPI_CS#)
OFF
OFF
On module SPI (default)
OFF
ON
Carrier FWH (not supported)
ON
OFF
Carrier SPI
ON
ON
On module SPI, carrier SPI contains management data
Table 41 Jumper BIOS selection
4.28
POST-Code Display
For debugging purposes a POST code display is implemented on the base board. The display of
BIOS outputs on IO-port 80h, 84h, 90h or 94h is selected using DIP switch S3101.
SW
Port Address
1 ON
80h (Default)
1 OFF
90h
2 ON
84h (Default)
2 OFF
94h
Table 42 POST-Code Selection
4.28.1
Lattice Programming Interface
A connector used to program the PLD to decode the POST codes is implemented. To reprogram
the PLD a Lattice programming adapter is required.
Specification:
References:
X3101
Connector:CAB 1001-161-008
Pin-out:
Refer to Table 43
