Motorola MCX600E, Service Manual, Page: 61 / 105

Frequency Synthesis
Theory of Operation 4-23
The output signal of the phase detector is a pulsed DC signal which is routed to the charge pump.
The charge pump outputs a current at pin 29 (I OUT of U8701). The loop filter (which consists of
R8715-R8717, C8723-C8725, C8727) transforms this current into a voltage that is applied to the
varactor diodes D8802, D8803 and alters the output frequency of the VCO. The current can be set to
a value fixed in the FRAC-N IC or to a value determined by the currents flowing into CPBIAS 1
(U8701-27) or CPBIAS 2 (U8701-26). The currents are set by the value of R8724 or R8726
respectively. The selection of the three different bias sources is done by software programming.
To reduce synthesizer lock time when new frequency data has been loaded into the synthesizer the
magnitude of the loop current is increased by enabling the IADAPT line (U8701-31) for a certain
software programmable time (Adapt Mode). The adapt mode timer is started by a low to high
transient of the FRACN CE line. When the synthesizer is within the lock range the current is
determined only by the resistors connected to CPBIAS 1, CPBIAS 2, or the internal current source.
A settled synthesizer loop is indicated by a high level of signal LOCK DET (U8701-2). Open
architecture only: LOCK DET adds up with signal SQ DET, weighted by resistors R0113, R0114,
and is routed to one of the uP´s ADCs input U0101-43. From the voltage weighted by the resistors
the uP determines whether SQ DET, LOCK DET or both are active.
In order to modulate the PLL the two spot modulation method is utilized. Via pin 8 (MODIN) on
U8701 the audio signal is applied to both the A/D converter (low freq path) as well as the balance
attenuator (high freq path). The A/D converter converts the low frequency analog modulating signal
into a digital code that is applied to the loop divider, thereby causing the carrier to deviate. The
balance attenuator is used to adjust the VCO’s deviation sensitivity to high frequency modulating
signals. The output of the balance attenuator is present at the MODOUT port (U8701-28) and
connected to the VCO modulation diode D8801.
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