http://www.motorola.com/computer/literature
IN-5
I
N
D
E
X
K
keyboard/mouse
dual function requirement
3-9
keyboard/mouse connector
3-9
L
L2 cache
1-1
,
3-1
LEDs
front panel
3-17
little-endian
2-8
local reset (LRST)
3-17
lowercase
5-15
M
M48T559 Watchdog timer
3-12
manufacturers’ documents
B-2
MCP750
arbitration for bus masters
1-26
as source of Flash memory
3-20
bus capacity
3-3
clock generation device
1-26
configuration detail location
3-14
debugger console port
1-26
default baud rate
1-26
Ethernet connector
3-5
handling big & little endian
2-8
voltage connector
1-26
MCP750 assembly installation
1-22
MCP750 basic contents
1-1
MCP750 defined
1-1
MCP750 description
3-2
MCP750 install restrictions
1-23
MCP750 required equipment
1-3
memory capacities
3-21
memory map
default
2-3
PCI local bus
2-3
,
2-4
memory maps
types
2-2
memory size
6-9
,
6-10
modem line support
3-13
MPIC Interrupt Controller
provided by Raven ASIC
2-6
MPU bus
processor bus
4-12
MPU initialization
5-3
MPU/PCI bus bridge controller
2-3
multiplex support
3-15
multiplexing
when used
3-16
N
NETboot enable
6-7
Network Auto Boot enable
6-7
NIOT command
restrictions
6-8
Non-Volatile RAM (NVRAM)
6-1
as containing PPCBug parameters
6-2
O
operating parameters
6-1
P
P2MX function
3-15
parallel I/O interface signal routing
3-8
parallel port
3-8
as transition module feature
3-21
parallel printer port
1-9
PBC
as PCI bus master
2-5
COM1/COM2 assignments
3-8
configuration
3-9
counter function
3-12
functions
3-9
PC87307
3-7
PCI activity LED
3-18
PCI bus
3-3
,
3-7
,
3-9
activity light
3-18
address range
2-5
I/O peripheral interfaces
3-3
PCI expansion
3-3
,
3-7
PCI map decoders
turning off
2-4
PCI mezzanine
