68000 Motherboard User’s Manual
Rev. A
Page 26 of 54
Table 9: Clock Divisor Selector, A1JP110
Clock Divisor
Jumper Position
Note
2
1-2
This setting relies on the D flip-flop to clock during the
narrow response of the 4017 RESET. RESET timing may be
adjusted with the R119/C119 filter.
4
3-4
6
5-6
8
7-8
10
9-10
12
11-12
14
13-14
16
15-16
18
17-18
Table 10: Divider Source Selector,
A1JP111
Divider Source
Jumper
Position
OSCHCLK (OSC110)
1-2
OSCFCLK (OSC111)
3-4
Discrete Crystal
Oscillator
(XCLK_RAW)
5-6
Table 11: System Clock Source
Selector, A1JP112
Clock Source
Jumper
Position
OSCHCLK (OSC110)
1-2
OSCFCLK (OSC111)
3-4
Discrete Crystal
Oscillator
(XCLK_RAW)
5-6
Symmetric Discrete
Crystal Oscillator
(HXCLK_OUT)
7-8*
Symmetric Divided
Clock (CLKDIVOUT)
9-10
Stack Connector CLKIN
Input (CLKIN)
11-12
Summary of Contents for MB68k-100
Page 1: ...Rev A Grant K c 2011 ...