Motorola GM1200E Service Manual Download Page 36

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Open Controller

3.1-6

Introduction/Theory of Operation

2.11

General Purpose Input/Output

The Controller provides one general purpose line (GP I/O) available on the accessory connector
J0400-12 to interface to external options. The software and the hardware configuration of the radio
model defines the function of the port. The port uses an output transistor (Q0432) controlled by

via ASFIC port GCB3 (pin B3).

An external alarm output, available on J0400 pin 4 is generated by the

P via ASFIC port GCB1 (pin

A3) and transistor Q0411. Input EXTERNAL PTT on J0400 pin 3 is read by the

P via line REAR

PTT and

P pin 8.

Pin 13 of the accessory connector J0400 provides a voltage at battery level while the radio is
switched on. The output is capable to drive a dc current up to 20mA. When the radio is switched on,
the voltage 9V3 turns on transistor Q0482. Transistor Q0482 switches on Q0481 and enables a
current flow from emitter to collector of Q0481. This path has a very low impedance and effectively
provides the same voltage level at SW FLT A+ as at FLT A+. If the radio is switched off the voltage
9V3 is at ground level which switches off Q0482 and in turn cuts off the current from emitter to
collector of Q0481.

2.12

Normal Microprocessor Operation

For this radio, the

P is configured to operate in one of two modes, expanded and bootstrap. In

expanded mode the

P uses external memory devices to operate, whereas in bootstrap operation

the

P uses only its internal memory. In normal operation of the radio the

P is operating in

expanded mode as described below.

In expanded mode on this radio, the

P (U0101) has access to three external memory devices;

U0102 (FLASH EEPROM), U0103 (SRAM), U0104 or U0107 (optional EEPROM). Also, within the

P there are 768 bytes of internal RAM and 640 bytes of internal EEPROM, as well as logic to select

external memory devices.

The (optional) external EEPROM (U0104 or U0107) as well as the

P’s own internal EEPROM

space contain the information in the radio which is customer specific, referred to as the codeplug.
This information consists of items such as: 1) what band the radio operates in, 2) what frequencies
are assigned to what channel, and 3) tuning information. In general tuning information and other
more frequently accessed items are stored in the internal EEPROM (space within the 68HC11K1),
while the remaining data is stored in the external EEPROM. (See the particular device subsection
for more details.)

The external SRAM (U0103) as well as the

P’s own internal RAM space are used for temporary

calculations required by the software during execution. All of the data stored in both of these
locations is lost when the radio powers off (See the particular device subsection for more details).

The FLASH EEPROM contains the actual Radio Operating Software. This software is common to all
open architecture radios within a given model type. For example Securenet radios may have a
different version of software in the FLASH EEPROM than a non-secure radio (See the particular
device subsection for more details).

The K1

P provides an address bus of 16 address lines (A0-A15), and a data bus of 8 data lines (D0-

D7). There are also three control lines; CSPROG (U0101-29) to chip select U0102-30 (FLASH
EEPROM), CSGP2 (U0101-28) to chip select U0103-20 (SRAM) and PG7_R_W to select whether
to read or to write. All other chips (ASFIC/PENDULLUM/DAC/FRACN/LCD/LED/optional EEPROM/
OPTION BOARD) are selected by 3 lines of the

P using address decoder U0105. When the

P is

functioning normally, the address and data lines should be toggling at CMOS logic levels.