Triple Timer Module
Triple Timer Module Programming Model
MOTOROLA
DSP56602 User’s Manual
9-11
9.4.6.5
Inverter (INV)—Bit 8
The Inverter (INV) bit affects the polarity of the external incoming signal on the TIO pin
when TIO is programmed as input, and affects the polarity of the pulse generated on the
TIO pin when TIO is programmed as output. In the Timer modes, if the INV bit is set,
the 1 to 0 transitions on the TIO input pin increment the counter. If TIO is programmed
as input and the INV bit is cleared, the 0 to 1 transitions on the TIO input pin increment
the counter. In the Input Width mode, the INV bit determines whether the high pulse or
the low pulse is measured. In the Input Period mode, the INV bit determines whether
the period is measured between rising or falling edges. If TIO is programmed as output
and the INV bit is set, the pulse generated by the timer is inverted. If the INV bit is
cleared, the pulse generated by the timer is of positive polarity. The INV bit is cleared by
hardware and software reset.
Notes:
1.
The INV bit affects both the timer and the GPIO modes of operation.
2.
To ensure proper functionality, the INV bit should be changed only when
the timer is disabled or in GPIO mode of operation.
3.
When the TIO is used as input to the prescaler, the polarity of the prescaler
source clock is not affected by the corresponding INV bit.
9.4.6.6
Timer Reload Mode (TRM)—Bit 9
The Timer Reload Mode (TRM) control bit determines the counter preload operation. In
Timer and Watchdog modes the counter is preloaded with the TLR value after the TE bit
is set and a first event occurs. If the TRM bit is set, the counter is reloaded each time it
reaches the value contained by the Timer Compare Register and the new event occurs. In
PWM mode, the counter is reloaded each time counter wraparound occurs (overflow)
and the new event occurs. In Measurement modes, the counter is preloaded with the
TLR value (if TRM = 1) on each appropriate edge of the input signal after the TE bit is
set. If TRM is cleared, the counter operates as a free-running counter, incrementing on
each incoming event. The TRM bit is cleared by hardware and software reset.
9.4.6.7
Direction (DIR)—Bit 10
The Direction (DIR) control bit determines the behavior of the TIO pin when used as a
GPIO pin. When the DIR bit is set, the TIO pin is an output. When the DIR bit is cleared,
the TIO pin is an input.The TIO pin can be used as a GPIO pin only when TC0–TC3 are
all cleared. If one or more of TC0–TC3 is not cleared, the GPIO function is disabled and
the DIR bit has no effect. The DIR bit is cleared by hardware and software reset.
9.4.6.8
Data Input (DI)—Bit 11
The Data Input (DI) bit reflects the value of TIO pin according to the INV bit. Reading
the DI bit reads the TIO pin if INV = 0, or the inverted TIO pin if INV = 1.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005
ARCHIVED BY FREESCALE SEMICONDUCT
OR,
INC.
2005
