<Dual-In-Line Package Intelligent Power Module>
1200V Mini DIPIPM with BSD Series APPLICATION NOTE
Publication Date: September 2015
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CHAPTER 3 SYSTEM APPLICATION GUIDANCE
3.1 Application Guidance
This chapter states the Mini DIPIPM application method and interface circuit design hints.
3.1.1 System connection
Fig.3-1-1 System block diagram (Example)
15V
V
D
AC line input
AC output
P-side input (PWM)
Bootstrap circuit
Inrush current limiter
circuit
C1: Electrolytic type with good temperature and frequency characteristics
Note: the capacitance also depends on the PWM control strategy of the application system
C2: 0.01
μ
-2
μ
F ceramic capacitor with good temperature, frequency and DC bias characteristics
C3: 0.1
μ
-0.22
μ
F Film capacitor (for snubber)
D1: Zener diode 24V/1W for surge absorber
Z : Surge absorber
C : AC filter(ceramic capacitor 2.2n -6.5nF)
(Common-mode noise filter)
P-side input (PWM)
C2
D1
C1
V
NC
W
V
U
Fo output CFO
P
CIN
N
N-side input (PWM)
M
P-side IGBTs
N-side IGBTs
Temp. Output
V
OT
Input signal
conditioning
Protection
circuit (UV)
Level shifter
Drive circuit
Input signal
conditioning
Protection
circuit (UV)
Level shifter
Drive circuit
Input signal
conditioning
Protection
circuit (UV)
Level shifter
Drive circuit
Drive circuit
Input signal
conditioning
Fo logic
Protection
circuit
Control supply
Under-Voltage
protection (UV)
Z C
C3
C1
D1
C2
N1
V
NC