<Dual-In-Line Package Intelligent Power Module>
1200V Mini DIPIPM with BSD Series APPLICATION NOTE
Publication Date: September 2015
23
Table 2-3-2
Detailed description
of input and output terminals
Item Symbol
Description
P-side drive supply
positive terminal
P-side drive supply
GND terminal
V
UFB
- V
UFS
V
VFB
- V
VFS
V
WFB
- V
WFS
Drive supply terminals for P-side IGBTs.
By virtue of applying the bootstrap circuit scheme, individual isolated power
supplies are not needed for the DIPIPM P-side IGBT drive. Each bootstrap
capacitor is charged by the N-side V
D
supply during ON-state of the corresponding
N-side IGBT in the loop.
Abnormal operation might happen if the V
D
supply is not aptly stabilized or has
insufficient current capability. In order to prevent malfunction caused by such
unstability as well as noise and ripple in supply voltage, a bypass capacitor with
favorable frequency and temperature characteristics should be mounted very
closely to each pair of these terminals.
Inserting a Zener diode (24V/1W) between each pair of control supply terminals is
helpful to prevent control IC from surge destruction.
P-side control
supply terminal
N-side control
supply terminal
V
P1
V
N1
Control supply terminals for the built-in HVIC and LVIC.
In order to prevent malfunction caused by noise and ripple in the supply voltage, a
bypass capacitor with good frequency characteristics should be mounted very
closely to these terminals.
Design the supply carefully so that the voltage ripple caused by operation keep
within the specification. (dV/dt
+/-1V/
μ
s, Vripple
2Vp-p)
It is recommended to insert a Zener diode (24V/1W) between each pair of control
supply terminals to prevent surge destruction.
N-side control GND
terminal
V
NC
Control ground terminal for the built-in HVIC and LVIC.
Ensure that line current of the power circuit does not flow through this terminal in
order to avoid noise influences.
Control input
terminal
U
P
,V
P
,W
P
U
N
,V
N
,W
N
Control signal input terminals.
Voltage input type. These terminals are internally connected to Schmitt trigger
circuit and pulled down by min
3.3k
Ω
resistor internally
The wiring of each input should be as short as possible to protect the DIPIPM from
noise interference.
Use RC coupling in case of signal oscillation. Pay attention to threshold voltage of
input terminal, because input circuit has pull down resistor.
Short-circuit trip
voltage detecting
terminal
CIN
For short circuit protection, input the potential of external shuint resistor to CIN
terminal through RC filter (for the noise immunity).
The time constant of RC filter is recommended to be up to 2
μ
s.
Fault signal output
terminal
F
O
Fault signal output terminal.
Fo signal line should be pulled up to the logic supply. (In the case pulling up to 5V
supply, over 5k
Ω
resistor is needed for limitting the Fo sink current I
Fo
up to 1mA.
Normally 10k
Ω
is recommended.)
Fault pulse output
width setting
terminal
CFO
The terminal is for setting Fo pulse width by connecting capacitor between V
NC
.
When 22nF is connected, then the Fo pulse width becomes typ. 2.4ms.
C
FO
(F) = 9.1
10
-6
t
FO
(Required Fo pulse width)
Temperature
output terminal
V
OT
LVIC temperature is ouput by analog signal.
This terminal is connected to the ouput of OP amplifer internally.
It is recommended to connect 5.1k
Ω
pulldown resistor if output linearlity is
necessary under room temperature.
Inverter DC-link
positive terminal
P
DC-link positive power supply terminal.
Internally connected to the collectors of all P-side IGBTs.
To suppress surge voltage caused by DC-link wiring or PCB pattern inductance,
smoothing capacitor should be inserted very closely to the P and N terminal. It is
also effective to add small film capacitor with good frequency characteristics.
Inverter DC-link
negative terminal
NU,NV,NW
Open emitter terminal of each N-side IGBT
These terminals are connected to the power GND through individual shunt resistor.
Inverter power
output terminal
U, V, W
Inverter output terminals for connection to inverter load (e.g. AC motor).
Each terminal is internally connected to the intermidiate point of the corresponding
IGBT half bridge arm.
Note: 1) Use oscilloscope to check voltage waveform of each power supply terminals and P&N terminals, the time division of OSC
should be set to about 1
μ
s/div. Please ensure the voltage (including surge) not exceed the specified limitation.
