2.3
Switch control and power Setup
2.3.1
USB Control
2.3.1.1
Set up instructions
Connect the switch to the computer using the provided MUSB-CBL-3+ USB cable or equivalent,
and then connect the required RF connections.
Note the maximum rating power input in the datasheet and the conditions specified for
it. Exceeding these values may damage the switch.
2.3.1.2
USB communication
USB communication for all H-Series is available
•
via provided GUI
•
via provided dll files for ActiveX and .Net (see programming manual for details)
•
direct access as described in programming manual.
2.3.2
I
2
C Control
(for U2C models)
2.3.2.1
Set up instructions
•
Connect the address lines in the control cable (varies by model, see model datasheet
for details) you wish to set to ‘0’ to GND, address bits which are to be ‘1’ can be left
unconnected – this will set the unit’s I
2
C address.
•
Connect the control cable to the I
2
C master device.
•
Power to the switch when controlled via I
2
C can be provided either via the I
2
C port (see
model datasheet for details) or via USB port to either a USB device or a power adaptor
such as USB-AC/DC-5+.
2.3.2.2
I
2
C communication (U2C models)
The I
2
C is a short-range synchronous communication protocol for simple 2-wire
communication with slave devices using clock (SCL) and data (SDA) connections. The
U2C models interface also include 3 address pins (A0, A1 and A2), allowing up to 8
switches to be controlled independently from a single master with shared SDA and SCL
connections.
All I
2
C pins are connected to an internal pullup resistor so will float to logic ‘1’ when
disconnected. This sets a default address of 111 for all units (decimal 7). Addresses
from 0 to 7 can be set by externally grounding the relevant address pins (A0, A1 and A2).
The I
2
C functionality is limited to setting or reading switch states. Control sequences are
sent to the switch in several bytes on the data connection, enclosed by a start and stop
signal, and clocked at up to 400 kHz. The switch will acknowledge each byte received
with a single “ACK” bit (logic 1) on the same data connection.
CAUTION
Page 12 of 23
AN-49-012 Rev.: (January 10, 2019) M171660 (R94356) File: AN-49-012(B).doc
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