Microwave Data Systems MDS 4310, Installation, Operation & Field Maintenance

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MDS 05-2415A01, Rev. A THEORY OF OPERATION 5-5
DIAGNOSTICS DATA CONTROL
Communications between the microcontroller U16 and an external terminal, PC or the HHT
is accomplished by means of the TXD (J1–Pin 2) and RXD (J1–Pin 3).
U16 constantly monitors transmit data input on J1–Pin 2, and ignores all data unless the
OPEN command from the external programmer is detected or a ground is detected on J1–Pin
23. The receive data output on J1–Pin 3 is normally connected to the output of the modem
demodulator when a modem is used. When the OPEN command is detected, U16 switches
the receive data path from the modem to its own data output port in order to allow it to
communicate directly with the terminal.
The receive data control pin of U16 controls the normally high base of Q8. When the
diagnostic channel is opened, Q8 is turned off, thus switching the state of gate U15X. This
allows data from the microcontroller to appear at the RXD output (J1-Pin 3).
TRANSMIT AUDIO
The transmit audio circuit consists of a variable gain amplifier, active low-pass filter, and a
summing amplifier. The variable gain amplifier U28C gain is set by R168. The transmit
audio then passes through a low pass filter consisting of U28B and associated components.
The output of U28B, and transmit audio from the remote maintenance board, are summed
together in amplifier U28D.
Transmit audio is also fed to the VCO input by means of a R179, which is the high frequency
(HF) compensation control. This control provides a balanced transmit audio frequency
response.
PLL/SYNTHESIZER
The temperature compensated 14.85 MHz crystal oscillator (TCXO) generates the reference
frequency for the phase-lock loop (PLL) circuit.
U36 is a CMOS PLL synthesizer consisting of a phase detector, a programmable reference
divider, a programmable feedback divider, and prescaler. Data input is serially loaded from
U16; this data consists of binary coded numbers representing the reference and feedback
(VCO RF sample) divider ratios required to produce the final transmit frequency. The
reference divider is programmed only on power-up, with a power reset or with a PLL
out-of-lock condition. The feedback divider value changes according to the transmit/receive
frequencies entered by the
PTX
and
PRX
commands, and is reloaded from the EEPROM every
time a transmit-to-receive or receive-to-transmit transition occurs.
The phase detector output of U36 is fed to the VCO tuning input through an R-C loop filter.
A sample of transmit audio modulation of the VCO is fed to the loop filter from the wiper of
R179.
The lock detector output of U36 is applied to U28A. When the PLL is in lock, U36 shuts off
U28A and keeps the O/L line low. An out-of-lock condition causes U28 to drive the O/L line
high. The O/L line inhibits the transmit regulator, as previously described in the POWER
SUPPLY section; also, it is conducted to J1-Pin 25, through a 1 k
Ω
resistor.
RS-232 DATA INTERFACE
U31 is an RS-232 line driver/receiver integrated circuit with an input/output disable function.
It has an in5 volts to
±
10 volt converter that allows it to provide an RS-232