Appendix: PQ208 Package Connections
UG0048 User Guide Revision 5.1
22
8
Appendix: PQ208 Package Connections
8.1
I/O Naming Conventions
Due to the comprehensive and flexible nature of ProASIC3/E device user I/Os, a naming scheme is used
to show the details of the I/O. The name identifies to which I/O bank it belongs, as well as the pairing and
pin polarity for differential I/Os.
Where,
m = Global pin location associated with each CCC on the device: A (northwest corner), B (northeast
corner), C (east middle), D (southeast corner), E (southwest corner), and F (west middle)
n = Global input MUX and pin number of the associated Global location m, either A0, A1,A2, vB0, B1, B2,
C0, C1, or C2
u = I/O pair number in the bank, starting at 00 from the northwest I/O bank in a clockwise direction
x = P (Positive) or N (Negative) for differential pairs, or S (Single-Ended) for the I/O that support single-
ended and voltage-referenced I/O standards only
w = D (Differential Pair) or P (Pair) or S (Single-Ended). D (Differential Pair) if both members of the pair
are bonded out to adjacent pins or are separated only by one GND or NC pin; P (Pair) if both members of
the pair are bonded out but do not meet the adjacency requirement; or S (Single-Ended) if the I/O pair is
not bonded out. For Differential (D) pairs, adjacency for ball grid packages means only vertical or
horizontal. Diagonal adjacency does not meet the requirements for a true differential pair.
B = Bank
y = Bank number [0.3] for ProASIC3 and [0.7] for ProASIC3E. Bank number starting at 0 from the
northwest I/O bank in a clockwise direction
page 24 are extracted from the ProASIC3E datasheet and provide
package connections for the A3PE1500 device. Pinouts for other devices in the PQ208 family can be
found at:
DS0097: ProASIC3 Flash Family FPGAs Datasheet
DS0098: ProASIC3E Flash Family FPGAs Datasheet
The website should always be referenced for access to the most recent datasheet.
IO Nomenclature
Gmn
IOuxwBy
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