Figure 3-54. JTAG Interface Schematic
GND
JTAG_CONN_TDI
JTAG_CONN_TMS
JTAG_CONN_TCK
JTAG_CONN_TDO
JTAG_CONN_nRST
VDD_3V3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
HDR-2.54 Male 2x10
J27
100R
0402
5%
R268
100k
0402
5%
R264
100k
0402
5%
R265
100k
0402
5%
R267
100k
0402
5%
R266
JTAG_CONN_NTRST
100k
0402
5%
R263
GND
JTAG 20-pin Connector
Table 3-45. JTAG/ICE Connector J27 Pin Assignment
Signal
Signal Name
Pin No.
Pin No.
Signal Name
Signal
+3.3V
VDD_3V3
2
1
VDD_3V3
+3.3V
GND
GND
4
3
JTAG_CONN_NTRST
NTRST
GND
GND
5
5
JTAG_CONN_TDI
TDI
GND
GND
8
7
JTAG_CONN_TMS
TMS
GND
GND
10
9
JTAG_CONN_TCK
TCK
GND
GND
12
11
GND
GND
GND
GND
14
13
JTAG_CONN_TDO
TDO
GND
GND
16
15
JTAG_CONN_nRST
nRST
GND
GND
18
17
Not connected
NC
GND
GND
20
19
Not connected
NC
3.5.3
Embedded Debugger (J-Link-OB) Interface
The SAMA7G54-EK includes a built-in SEGGER J-Link-On-Board (J-Link-OB) device. The functionality is
implemented with an ATSAM3U4C microcontroller in an LFBGA100 package. The ATSAM3U4C provides the
functions of the JTAG interface and a bridge from USB to the serial debug port (CDC, or Communication Device
Class). The two-colored LED (D10) shows the status of the J-Link-OB device.
The J-Link-OB device is designed to provide an efficient, low-cost, on-board alternative to the standard J-Link or
SAM-ICE.
Its own dedicated USB port acts as a power source for this block (which is separated from the rest of the system) and
provides the communication link to program and debug the MPU.
SAMA7G54-EK
Function Blocks
©
2022 Microchip Technology Inc.
and its subsidiaries
User Guide
DS50003273A-page 61
