PLECS Model Quick Start Guide for Vienna PFC
DS50002997A-page 17
2020 Microchip Technology Inc.
FIGURE 5-2:
Front-End Input Subsystem Selection.
5.2
POWER STAGE
The model contains two power stage configurations: Power Stage and Power Stage
with Thermal Model. The thermal model includes:
• Boost inductor core loss
• Schottky barrier diode conduction loss and temperature
• MOSFET conduction loss, switching loss, and temperature
• Heat sink temperature
Since the thermal model considerably increases simulation time, a configuration
without the thermal model is included.
FIGURE 5-3:
Power Stage.
