Schematics and Layouts
©
2011 Microchip Technology Inc.
DS51994A-page 17
A.3
SCHEMATIC - LCD AND UART
Rev
5
A
B
1
Size
Title
D
Eng:
3
4
2
1
A
B
4
3
2
1
3/18/10
6
Date
LCD_EXPLO
R
ER
16
.SCHDOC
C
Sheet
Draw
n
by
:
of
Rev
C
D
B.Popescu
A.Hapenciuc
Description
Filen
a
me:
B
Date:
M
5
Initial
Design
2
+3.3V
+5V
VEE
+3.3V
RB15/PMPA0
RD5/PMPRD
RD4/PMPWR
GNDA
RB15/PMPA0
RD5/PMPRD
RD4/PMPWR
TX
RX
RC14
RD15/U1RTS
TX
RX
+3.3V
+3.3V
VEE
+3.3V
GNDA
GNDA
GNDA
GNDA
GNDA
RE7/PMPD7
RE6/PMPD6
RE5/PMPD5
RE3/PMPD3
RE2/PMPD2
RE1/PMPD1
RE0/PMPD0
RE7/PMPD7
RE6/PMPD6
RE5/PMPD5
RE4/PMPD4
RE2/PMPD2
RE1/PMPD1
RE0/PMPD0
RD14/U1CTS
RC13
RF3/U1TX
U6RX
1.3K
R16
10K
R15
100NF
C12
GNDA
NONE
R17
NONE
R18
RE4/PMPD4
RE3/PMPD3
100NF
C34
100NF
C36
1K
R32
GNDA
100NF
C30
GNDA
GNDA
1K
R33
100NF
C35
M
C
P3903
Eval
Board
for
16-bit
MCU
3/31/10
GND
1
VCC
2
RS
4
E
6
R/W
5
VC
3
DB7
14
DB4
11
DB2
9
DB5
12
DB3
10
DB1
8
DB0
7
DB6
13
LCD2
LCD_T
M162JCAWG
1
100NF
C33
1
6
2
7
3
8
4
9
5
J3
DB9RF
DB7
11
DB4
8
DB2
6
E
3
DB1
5
DB0
4
DB3
7
DB5
9
DB6
10
GND1
15
VCC
13
RS
1
R/W
2
VEE
14
GND
12
LCD1
LCD_2X16_BOTH
LCD/EXPLORER
16
INVALID
11
T1IN
13
R1IN
16
GND
18
R1OUT
15
T1OUT
17
T2IN
12
FORCEON
14
VCC
19
FORCEOFF
20
R2OUT
10
T2OUT
8
C2+
5
V+
3
C1-
4
C2-
6
V-
7
R2IN
9
EN
1
C1+
2
SN75C3223PW
U6
NET00052
NET00063
NET00064
NET00065
NET00066
NET00067
NET00068
NET00071
NET00073
NET00074
NET00075