Figure 7-13. ICSP Interface
GND
GND
MCU_RESET
TARGET SELECT On board MCU or PIM
ICSP
3V3_PIC
3V3_PIC
1
4
2
3
TACT SPST
SW401
PESD5V0S1BA
D400
1K
0603 1%
R405
10k
0603
1%
R404
0.1uF
50V
0603
C413
0.1uF
50V
0603
C414
MCLR
JS202011SCQN
6
4
5
1
2
3
S400
GND
PIM_MCLR
PIC32_MCLR
3V3_GEN
3V3_PIC
1 2
HDR-2.54 Male 1x2
JP400
VDD
8
VSS
4
CE
1
WP
3
SCK
6
HOLD
7
SO
2
SI
5
SST25VF080B
U401
3V3_PIC
0.1uF
50V
0603
C410
20k
0603
5%
R403
3V3_PIC
MCU_SDO
MCU S-Flash
3V3_PIC
10uF
25V
0805
C411
MCU_BCLK
MCU_SDI
FLASH_CS#
PGEC1
PGED1
Shunt 2.54mm 1x2
JP402
1
2
3
4
5
6
HDR-2.54 Male 1x6
J400
Figure 7-14. I2S Header
1
2
3
4
5
6
7
HDR-2.54 Male 1x7
J404
1
2
3
4
5
6
7
HDR-2.54 Male 1x7
J405
BT
DSP
RFS1_DSP
SCLK1_DSP
DT1_DSP
DR1_DSP
MCLK1_DSP
RFS1
DR1
DT1
SCLK1
Serial clock
Serial data receive
Serial data transmit
I2S HEADER
33R
0603
5%
R431
33R
0603
5%
R429
33R
0603
5%
R432
33R
0603
5%
R433
Receive Frame Sync
33R
0603
5%
R430
MCLK1
3V3_IO
3V3_IO
BM83 EVB
Appendix A: BM83 EVB Reference Schematics
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2019 Microchip Technology Inc.
User Guide
DS50002902A-page 50