For more information, refer to the following documents:
• SAMA5D2 Series Data sheet available on
LPDDR2 Power Fail
Management
and
MPDDRC Low-Power Register
• Jedec Standard
Low Power Double Data Rate 2 (LPDDR2)
, JESD209-2B
Note:
An uncontrolled power-off sequence can be applied only up to 400 times in the life of an LPDDR2 device.
3.4.2.4
Backup Power Supply
The ATSAMA5D27-WLSOM1-EK1 features a power source in order to permanently power the backup area of the
SAMA5D2 device (refer to the SAMA5D2 Series datasheet). A super capacitor (C13) sustains such permanent power
to VDDBU when all system power sources are off.
Figure 3-5. VDDBU Powering Options
JP4
RB160M-60TR
D6
1
2
3
BAT54C
D7
100R
0402
5%
R92
0.1uF
10V
0402
C15
VDD_MAIN
VIN
1
SHDN
3
GND 2
NC
4
VOUT 5
MCP1711/1.8V
U6
0.1uF
10V
0402
C18
VDDBU
0.22F
5.5V
C13
1
2
HDR-2.54 Male 1x2
J17
3.4.2.5
VDDFUSE Regulator
The ATSAMA5D27-WLSOM-EK1 board embeds an LDO that delivers 2.5V to VDDFUSE for Fuse box programming
and for Secure Mode switching.
Figure 3-6. VDDFUSE Powering Options
VDD_3V3
1uF
10V
0402
C17
1uF
10V
0402
C14
VDDFUSE
VIN
1
GND 2
EN
3
NC
4
VOUT 5
MIC5366-2.5YC5-TR
U4
3.4.3
Push Button Switches
The ATSAMA5D27-WLSOM1-EK1 features four push buttons:
• SW1– Wake-up push button connected to the SAMA5D27 WKUP pin, used to exit the processor from Backup
mode.
• SW2 – Reset push button. When pressed and released, the baseboard is reset.
• SW3 – Power-on/off button
• SW4 – User momentary push button connected to PIO PB2
ATSAMA5D27-WLSOM1-EK1
Baseboard Components
©
2019 Microchip Technology Inc.
User Guide
DS50002931A-page 11
