background image

Micrel, Inc.

SY87725L Evaluation Board

July 2008

2

M9999-071108-B

[email protected]

 or (408) 955-1690

Evaluation Board Description

AC-Coupled Evaluation Board

The  SY87725L  is  64-pin  EPAD-TQFP  package.  The
evaluation board is designed to operate with a single 3.3V
±10%  power  supply  and  is  configured  with  AC-coupled
inputs  and  outputs.  The  high-speed  input  and  output
channels  are  brought  out  to  SMA  connectors  through
matched-length AC-coupled differential strip-line traces.

AC-Coupled Input

For  ease  of  use,  the  AC-coupled  inputs  are  biased  on-
board.  The  user  need  only  supply  the  appropriate  input
swing to the board.

AC-Coupled Output

The  SY87725L  is  configured  with  AC-coupled  outputs
allowing  the  board  to  interface  directly  with  50

equipment. AC-coupling allows the board to use a single
power supply.

Unused Output

Single-Ended to Scope

Unused complimentary outputs should be terminated into
50

-to-ground to prevent unwanted reflections.

AC-Coupled Evaluation Board Setup

Setting  up  the  SY87725L  AC-Coupled  Evaluation
Board

1.  Set the voltage on a DC supply to +3.3V and

turn off the supply. Connect the GND terminal to
the negative side of a DC power supply.
Connect the V

CC

 terminal to the positive side of

a DC power supply.

2.  For a LVPECL input signal, set V

T

 to V

CC

–2.0V.

3.

  Signal Generator: Using a differential signal

source, set the amplitude of each side of the
differential pair to 400mV (800mV measured
differentially). Set the offset to a positive value,
the value of the offset is not critical, since the
AC-coupled inputs will be automatically biased.
Turn off the outputs of the signal source.

4.  I/O Cable Interface: Using equal length 50

impedance coaxial cables connect the signal
source to the inputs on the evaluation board.
Using equal length 50

 impedance coaxial

cables connect the outputs of the evaluation
board to the oscilloscope of another
measurement device that has an internal 50

termination. Unequal length cables are not
recommended since they introduce duty cycle
distortion and unwanted signal delays.

5.  Connect the trigger input of the scope to the

trigger output of the signal generator.

6.  Set the evaluation board dipswitch to the

appropriate input selection.

7.

  Enable the signal source, turn on the DC source,

and monitor the outputs.

Evaluation Board Layout

PC Board Layout

The evaluation boards are constructed with Rogers 4003
material and are coplanar in design fabricated to minimize
noise, achieve high bandwidth and minimize crosstalk.

L1

GND and Signal

L2

GND

L3

VCC

L4

GND

Table 1. Layer Stack

Summary of Contents for SY87725L

Page 1: ...ation board is optimized to interface directly to 50 test equipment since the evaluation board is configured with AC coupled inputs and AC coupled outputs All datasheets and support documentation can...

Page 2: ...nnect the VCC terminal to the positive side of a DC power supply 2 For a LVPECL input signal set VT to VCC 2 0V 3 Signal Generator Using a differential signal source set the amplitude of each side of...

Page 3: ...Micrel Inc SY87725L Evaluation Board July 2008 3 M9999 071108 B hbwhelp micrel com or 408 955 1690 Evaluation Board Schematic...

Page 4: ...not used in that mode The diagram to the left of the table shows the actual dip switch settings as they would appear on the evaluation board The dip switches are configured with a pull up resistor on...

Page 5: ...e connections to SIN and SOUT as well as the power supply connections to the evaluation board The SOUT output can be monitored with a scope or a serial BERT Figure 1 Switch Settings for Remote Loopbac...

Page 6: ...clock coming out of SOUT will be synchronous with the RefClk source Figure 2 Switch Settings for Remote Loopback Recovered Clock Switch Settings Function RCV_FSEL0 1 11 Sets receive CDR frequency to...

Page 7: ...CDR operation can be verified with a serial BERT Figure 3 Switch Settings for Remote Loopback Recovered Data Switch Settings Function RCV_FSEL0 1 11 Sets receive CDR frequency to 2 48832Gbps For othe...

Page 8: ...Data In SIN For example if REFCLK is 155 52MHz then SIN must be at 155 52Mbps The 4 bit parallel data at the output of DOUT0 3 can be verified with a parallel BERT Figure 4 Switch Settings for CDR Byp...

Page 9: ...3 outputs The CLKIN is multiplied by 4 up to the serial rate by the synthesizer clock multiplier This allows a parallel BERT to be used to verify the Mux and DeMux operation independent of the CDR Fig...

Page 10: ...Switch Settings Function RCV_DDRSEL 0 Sets Clkout at parallel data rate RCV_CTRL0 1 11 Selects the normal receive data path RCV_FSEL0 1 11 Sets receive CDR frequency to 2 48832Gbps For other frequenc...

Page 11: ...0F Vishay 1 0W resistor size 0402 1 R1 R2 R15 R17 R19 R27 R29 R72 CRCW04021270F Vishay 1 127W 1 resistor size 0402 8 R3 R4 R16 R18 R20 R28 R30 R31 CRCW040282R5F Vishay 1 82 5W resistor size 0402 8 R9...

Page 12: ...Micrel Inc SY87725L Evaluation Board July 2008 12 M9999 071108 B hbwhelp micrel com or 408 955 1690 APPENDIX TEST FLOW DIAGRAM FOR SY87725L EVALUATION BOARD...

Page 13: ...Micrel Inc SY87725L Evaluation Board July 2008 13 M9999 071108 B hbwhelp micrel com or 408 955 1690 APPENDIX TEST FLOW DIAGRAM FOR SY87725L CONTINUED...

Page 14: ...is data sheet is believed to be accurate and reliable However no responsibility is assumed by Micrel for its use Micrel reserves the right to change circuitry and specifications at any time without no...

Reviews: