KSZ8851SNL-Eval Evaluation Board User’s Guide
Rev. 1.1
Micrel, Inc.
April 21, 2010
8/11
Pin #
(JP1)
SPI Interface
Signal Name
Description
4 SCLK
Serial clock input from host CPU for SPI interface. This
clock speed can run up to 50 MHz
6
SI
Serial data in from host CPU for SPI interface
8 CSN
Chip Select Enable (Active low) from host CPU for SPI
interface
10
SO
Serial data out to host CPU for SPI interface
Table 1. Header JP1 – Host Connection for SPI Interface
Pin # (JP1)
Power & Control
Signal Names
Description
1
5.0V_IN
+5V power supply inputs for this board
2, 9
GND
Ground inputs/pins
3
RSTN
Reset input from host CPU
5
PME
Power Management Event output to host CPU
7
INTRN
Interrupt output to host CPU
Table 2. Header JP1 – Host Connection for Control and Power
4.2 Jumper Setting & Definition
The KSZ8851SNL-Eval does not require any jumper for normal operation except the VDD_IO
option. During power-up, the KSZ8851SNL is configured using the chip’s internal pull-up and pull-
down resistors with its default strapping pin value which will set this device in operation of without
EEPROM. Jumpers are provided to override the default settings, allowing for quick configuration
and re-configuration of the board. To override the default settings, simply select and close the
desired jumper setting(s) and toggle the on-board manual reset button (S1) for the new setting(s)
to take effect.
The KSZ8851SNL-Eval jumper settings are defined in Table 3 below.
Jumper Definition Setting
Description
JP2 EED_IO
OFF
(Default)
OFF: EEPROM is not present
ON: EEPROM is present
JP3
1.8V
OFF (Default)
OFF: VDD_IO is 2.5V or 3.3V
ON: VDD_IO is 1.8V
JP4
3.3V
ON (Default)
ON: to select 3.3V (JP5 and JP6 must be OFF)
OFF: De-select 3.3V
JP5
2.5V
OFF (Default)
ON: to select 2.5V (JP4 and JP6 must be OFF)
OFF: De-select 2.5V
JP6
1.8V
OFF (Default)
ON: to select 1.8V (JP4 and JP5 must be OFF)
OFF: De-select 1.8V
Table 3. KSZ8851SNL-Eval Jumper Definition
