7I92 8
OPERATION
FPGA
The 7I92 use a Xilinx Spartan6 XC6SLX9-TQ144 Spartan6 FPGA.
IP ADDRESS SELECTION
Initial communication with the 7I92 requires knowing its IP address. The 7I92 has
3 IP address options: Default, EEPROM, and Bootp, selected by jumpers W5 and W6.
Default IP address is always 192.168.1.121. The EEPROM IP address is set by writing
Ethernet EEPROM locations 0x20 and 0X22. BootP allows the 7I92 address to be set by
a DHCP/ BootP server. If BootP is chosen, the 7I92 will retry BootP requests at a ~1 Hz
rate if the BootP server does not respond.
HOST COMMUNICATION
The 7I92 standard firmware is designed for low overhead real time communication
with a host controller so implements a very simple set of IPV4 operations. These
operations include ARP reply, ICMP echo reply, and UDP packet receive/send for host
data communications. UDP is used so that the 7I92 can be used on a standard network
with standard tools for non-real time applications. No fragmentation is allowed so
maximum packet size is 1500 bytes.
UDP
All 7I92 data communication is done via UDP packets. The 7I92 socket number for
UDP data communication is 27181. Read data is routed to the requesters port number.
Under UDP, a simple register access protocol is used. This protocol is called LBP16.
LBP16
LBP16 allows read and write access to up to eight separate address spaces with
different sizes and characteristics. Current firmware uses seven of these spaces. For
efficiency, LBP16 allows access to blocks of registers at sequential increasing addresses.
(Block transfers)
WINDOWS ARP ISSUES
Windows TCP stack has a characteristic that causes it to drop outgoing UDP
packets when refreshing its ARP cache. Because of this you must either verify packet
transmission via echoing data from the 7I92 for every transaction (reading RXUDPCount
is suggested) and retrying failed transactions, or alternatively, setting up a static entry for
the 7I92 in the ARP table. This is done with windows ARP command.