DMU380ZA Series
User’s Manual
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Doc# 7430-3810 Rev.02
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System Output Data Rate
0x00 (0): Data output suppressed
0x01 (1): 200 Hz (default)
0x02 (2): 100 Hz
0x03 (3): 50 Hz
0x04 (4): 25 Hz
0x05 (5): 20 Hz
0x06 (6): 10 Hz
0x07 (7): 5 Hz
0x08 (8): 4 Hz
0x09 (9): 2 Hz
0x10 (10): 1 Hz
[7:1 ]
Unused
0
System Clock
0: External Clock
1: Internal Clock (default)
The ODR enables the master to specify the output rate of data provided by the
DMU380ZA. Setting this register directly affects the data-ready signal. The default
ODR is 200 Hz; to change the ODR to 100 Hz, the master sends 0xB702.
The system clock setting (bit 0) switches between the internal (DMU380ZA) system
clock and the external 1 kHz sync signal. To switch to an external clock, the master
sends 0xB600.
5.7.3
Rate-Sensor Scaling/Low-Pass Filter
The rate-sensor scaling and digital low-pass filter configuration are combined into a
single 16-bit register at memory location 0x38; individual bits are assigned according to
Table 27. Note: these settings apply only to data output via the DMU380ZA SPI port and
do not affect the low-level UART output port.
Table 27 Sensor Scaling/Digital Low-Pass Filter Register
(Base Address: 0x38), Read/Write
Bits
Description (Default: 0x0206)
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Unused
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Rate-Sensor Scaling/Dynamic Range Selector
0x1 (1): +/-62.5°/sec
0x2 (2): +/-125.0°/sec (default)
0x4 (4): +/-250.0°/sec
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Digital Low-Pass Filter
0x00 (0): Unfiltered
0x03 (3): 40 Hz Bartlett
0x04 (4): 20 Hz Bartlett
0x05 (5): 10 Hz Bartlett
0x06 (6): 5 Hz Bartlett (default)
0x30 (48): 50 Hz Butterworth
0x40 (64): 20 Hz Butterworth
0x50 (80): 10 Hz Butterworth
0x60 (96): 5 Hz Butterworth
The rate-sensor scaling selector adjusts the output scaling applied to the rate-sensor
values in registers 0x04 through 0x08 as well as the values in the standard data-packet
(scaling in the other data-packets are not affected). Additionally, this setting affects the