December 20, 2005
i
Table of Contents
1
OVERVIEW .....................................................................................................................1
2
THE VIRTEX-4 MB SYSTEM BOARD ..............................................................................1
3
FUNCTIONAL DESCRIPTION .........................................................................................2
3.1
LVDS I
NTERFACE
.......................................................................................................3
3.1.1
SPI-4.2 Interface.................................................................................................4
3.1.2
SPI-4.2 Pin Assignments.....................................................................................4
3.1.3
LVDS Connector.................................................................................................6
3.2
DDR SDRAM ............................................................................................................7
3.3
F
LASH
.......................................................................................................................8
3.4
C
LOCK
S
OURCES
........................................................................................................9
3.4.1
Programmable LVDS Clock Source ................................................................... 11
3.4.2
ICS8442 Programmable LVDS Clock Synthesizer............................................... 11
3.4.3
ICS8442 Clock Generation................................................................................ 13
3.4.4
ICS8442 Programming Modes ........................................................................... 14
3.4.5
ICS8442 M and N Settings ................................................................................ 14
3.5
10/100 E
THERNET
PHY ............................................................................................. 18
3.6
LCD P
ANEL
.............................................................................................................. 20
3.7
USB 2.0
TO
RS232 P
ORT
.......................................................................................... 20
3.8
RS232 .................................................................................................................... 21
3.9
U
SER
DIP
AND
PB S
WITCHES
..................................................................................... 22
3.10
U
SER
LED
S
.......................................................................................................... 23
3.11
VBAT J
UMPER
...................................................................................................... 23
3.12
C
ONFIGURATION AND
D
EBUG
P
ORTS
......................................................................... 23
3.12.1
JTAG Chain ..................................................................................................... 23
3.12.2
System ACE Module Connector......................................................................... 24
3.12.3
Serial Data Flash .............................................................................................. 26
3.12.4
JTAG Port (PC4) .............................................................................................. 31
3.12.5
Configuration Modes ......................................................................................... 31
3.13
V
OLTAGE
R
EGULATORS
.......................................................................................... 32
3.14
B
ANK
I/O V
OLTAGE
................................................................................................ 33
3.15
P240 E
XPANSION
M
ODULE
S
IGNAL
A
SSIGNMENTS
...................................................... 33
4
REVISIONS ................................................................................................................... 36
APPENDIX A ....................................................................................................................... 37