Page 6
3 Precision Time Protocol (PTP) / IEEE1588
The Time Stamp Unit, integrated in an FPGA (Field Programmable Gate Array, a programmable logic device),
checks the data trac on the MII-interface between the PHY receiver (physical connection to the network) and
the Ethernet controller (MAC) on the PTP module. If a valid PTP packet is detected, the time stamp unit takes
a time stamp of that packet which is read by a single board computer (SBC) running the PTP software. The
conguration and status trac between the PTP board and main SBC is done over a USB connection.
3.2 Functionality in Master Systems
10/100MBit
LAN
10 Mhz from GPS
RJ45 with
magnetics
and LEDs
PHYceiver
MAC
controller
USB hub
FPGA
microcontroller
with integrated
progr. memory
10M/activity
100M/activity
Rx/Tx
MII interface
USB
USB 1.1
to computer
module
Time Stamp Unit PTP Master
FPGA
configuration
memory
PPS from GPS
control
adr/data
control
data
USB
After power up, the module accepts the absolute time information (PTP seconds) of a reference time source
(GPS reference clock) only once, and the PTP nanoseconds are set to zero. If the oscillator frequency of the
reference time source has reached its nominal value, the nanoseconds are reset again. This procedure leads to a
maximum deviation of 20 nsec of the pulse per second (1PPS) of the PTP Master compared to the 1PPS of the
GPS reference clock. The reference clock of the PTP board's time stamp unit (50 MHz) is derived from the GPS
disciplined oscillator of the reference time source using a PLL (Phase Locked Loop) of the FPGA. The achieves
a direct coupling of the time stamp unit to the GPS system.
3.3 Functionality in Slave Systems
10/100MBit
LAN
10 MHz
PPS
programmable
outputs
modulated
time code
RJ45 with
magnetics
and LEDs
PHYceiver
MAC
controller
USB hub
status LEDs
driver
circuits
FPGA
filter and
driver circuit
oscillator
DAC
microcontroller
with integrated
progr. memory
FPGA
configuration
memory
10M/activity
100M/activity
Rx/Tx
MII interface
USB
USB
data
control
control
control
voltage
PWM time code
clock
adr/data
control
USB 1.1
to computer
module
clock
status
Time Stamp Unit PTP Slave
After decoding valid time information from a PTP Master, the system sets its own PTP seconds and nanoseconds
accordingly. The PTP oset calculated by the PTP driver software of the single board computer is used to adjust
the master oscillator of the TSU-USB. This allows the PTP Slave to generate very high accuracy output signals
(10 MHz/1PPS/IRIG).
6
Date: 22nd November 2012
PTP270PEX
Summary of Contents for PTP270PEX
Page 1: ...MANUAL PTP270PEX IEEE 1588 Computer Clock 22nd November 2012 Meinberg Radio Clocks GmbH Co KG...
Page 2: ......
Page 18: ...7 3 IRIG Standard Format Page 15 7 3 IRIG Standard Format PTP270PEX Date 22nd November 2012 15...
Page 19: ...Page 16 7 Time codes 7 4 AFNOR Standard Format 16 Date 22nd November 2012 PTP270PEX...