Mode 1: Retriggerable „One Shot“.
Mode 2: Asymmetric divider.
Mode 3: Symmetric divider.
Mode 4: Counter start by software trigger.
Mode 5: Counter start by hardware trigger.
4.2.2. Clock Source
With the parameter
<iRef>
of the function
you
can define the clock source (CLK) for the single counters resp.
counter components (see also the block diagrams from page 10
up).
ME_REF_CTR_INTERNAL_PREVIOUS
Clock source is the output of previous counter within a counter
component. On the ME-1400C/D cascading is also possible
from component to component (exception: counter 14 with
15).
ME_REF_CTR_INTERNAL_1 MHZ
Clock source is the internal 1 MHz crystal oscillator (setting
for each counter component possible).
ME_REF_CTR_INTERNAL_10 MHZ
Clock source is the internal 10 MHz crystal oscillator (setting
for each counter component possible).
ME_REF_CTR_EXTERNAL
Clock source is an external oscillator (setting for each single
counter possible).
4.2.3 Cascading
To cascade the counters, the clock input (CLK) of a counter can be
connected to the counter output (OUT) of the previous counter
without external wiring (only within the same component).
For example: The counters 0, 1 and 2 should be cascaded and
counter 0 should be sourced externally. In the parameter
<iRef>
of the function
the following constants have to
be passed:
ME_REF_CTR_EXTERNAL: Connect the clock input of counter 0
(CLK 0) with the external clock input.
ME_REF_CTR_INTERNAL_PREVIOUS: Connect the clock input of
counter 1 (CLK 1) with the output of counter 0 (OUT 0).
Summary of Contents for ME-1400
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Page 26: ...B4 Additional Mounting Bracket...