58
No.
Pin Port
Mode
I/O
STBY Initial
Function
SA7003 SA8003
1 P3_3
LCD_RS
I
I
I
-
LCD SELECTION REGISTER
2 P3_4
SDA
I/O
I/O
I
H
IIC DATA
3 MODE
MODE
I
I
I
-
-
4 P4_3
IPOD_RESET
I
O
I
L
IPOD ATTESTATION IC RESET OUTPUT
5 P4_4
SACD_DIR
I
I
I
L
SIGNAL CHANGE OUTPUT POWER OF
SACD AND DIR
6 RESET
RESET
I
I
I
-
-
7 XOUT
CLOCK
-
-
-
-
20MHZ
8 VSS
VSS
-
-
-
-
GND
9 XIN
CLOCK
-
-
-
-
20MHZ
10 VCC
VCC
-
-
-
-
3.3V
11 TRCIOD
TRY_OPN
O
O
I
L
TRAY OPEN OUTPUT PWM OUTPUT
12 TRCIOC
TRY_CLS
O
O
I
L
TRAY CLOSE OUTPUT PWM OUTPUT
13 P5_2
DIR_XMODE
I
I
I
L
DIR RESET OUTPUT
14 P5_1
DAC_GAIN
O
O
I
L
DAC GAIN CHANGE OUTPUT
15 P5_0
INVERT_LED
I
I
I
L
BALANCE OUTPUT POLARITY DISPLAY
LED
16 P2_7
SIDE_LED_OFF
I
I
I
L
FRONT PANEL BLUE LED ON/OFF OUTPUT
17 P2_6
DIS_SO
O
O
I
H
FLD/LCD DATA OUT PUT
18 P2_5
DIS_SCL
O
O
I
H
FLD/LCD CLOCK OUT PUT
19 P2_4
DIS_CS
O
O
I
H
FLD/LCD CHIP SELECT OUT PUT
20 P2_3
DIS_RESET
O
O
I
L
FLD/LCD RESET OUT PUT
21 P2_2
IR_IN
I
I
I
-
REMOTE CONTROL INPUT
22 P2_1
MOD_XDVDRST
O
O
I
L
MECHANISM MODULE RESET OUTPUT
23 P2_0
MOD_XREADY
O
O
I
H
MECHANISM MODULE XRDY OUTPUT
24 INT1
MOD_ACK
I
I
I
-
MECHANISM MODULE ACK INPUT
25 CLK0
MOD_SCLK
I
I
I
-
MECHANISM MODULE COMMUNICATION
CLOCK INPUT
26 RXD0
MOD_MDATA
I
I
I
-
MECHANISM MODULE COMMUNICATION
DATA INPUT
27 TXD0
MOD_SDATA
O
O
I
L
MECHANISM MODULE COMMUNICATION
DATA OUTPUT
28 P8_6
SACD_USB
O
O
I
L
THE SIGNAL CHANGE OF USB AND SACD
29 P8_5
DAC_RESET
O
O
I
L
DACRESET OUTPUT
30 P8_4
CUT_DIG
O
O
I
H
DIGITAL OUT ON/OFF CONTROL
31 P8_3
AUDIO_MUTE
O
O
I
H
DIGITAL OUT ON/OFF CONTROL
32 P8_2
STBY_CNT
O
O
O
H
STANDBY CONTROL SIGNAL
33 P8_1
DIS_OFF
O
O
I
L
DISPLAY OFF LED OUTPUT
34 P8_0
DVD_POWER
O
O
I
H
MECHANISM MODULE POWER SUPPLY
CONTROL
35 P6_0
IPOD_ERR
I
I
I
-
EYE KURONASU COMMUNICATION ERROR
DETECTION
36 P4_5
LCD_LED_OFF
I
I
I
L
LCD BACK LIGHT-OFF SIGNAL
37 TXD1
UART_TX
O
O
I
H
FOR EXTERNAL UART COMMUNICATION
38 RXD1
UART_RX
I
I
I
-
FOR EXTERNAL UART COMMUNICATION
39 CLK2
USB_SCK
I
O
I
H
USB IC COMMUNICATION CLOCK INPUT
15. MICROPROCESSOR AND IC DATA
QF01 : R5F212AASNFP
