38
IC401 :
D
IN
D
OUT
CLK
Key
1
to
Key
4
SW
1
to
SW
4
STB
R
4
4
OSC
5-bit latch
Key data memory (4
×
12)
Timing generator
key scan
Display memory
20 bit
×
16 Word
Command decoder
Dimming
circuit
4-bit latch
16
8
8
8
8
20
12
Seg
1
Seg
12
Seg
13
/Grid
16
Seg
20
/Grid
9
Grid
1
Grid
8
16-bit shift register
Data selector
Segment/grid
driver
Grid driver
Segment driver
20-bit output latch
Serial I/F
V
DD
LED
1
LED
5
V
DD
(+5 V)
V
SS
(0 V)
V
EE
(
−
30 V)
1
SW
1
2
SW
2
3
SW
3
4
SW
4
5
D
OUT
6
D
IN
7
IC
8
CLK
9
STB
10
KEY
1
11
KEY
2
12
KEY
3
13
KEY
4
39
Grid
6
38
Grid
7
37
Grid
8
36
Seg
20
/Grid
9
35
Seg
19
/Grid
10
34
V
EE
33
V
DD
32
Seg
18
/Grid
11
31
Seg
17
/Grid
12
30
Seg
16
/Grid
13
29
Seg
15
/Grid
14
28
Seg
14
/Grid
15
27
Seg
13
/Grid
16
14
V
DD
15
Seg
1
/KS
1
16
Seg
2
/KS
2
17
Seg
3
/KS
3
18
Seg
4
/KS
4
19
Seg
5
/KS
5
20
Seg
6
/KS
6
21
Seg
7
/KS
7
22
Seg
8
/KS
8
23
Seg
9
/KS
9
24
Seg
10
/KS
10
25
Seg
11
/KS
11
26
Seg
12
/KS
12
52
OSC
51
V
SS
50
LED
1
49
LED
2
48
LED
3
47
LED
4
46
LED
5
45
V
DD
44
Grid
1
43
Grid
2
42
Grid
3
41
Grid
4
40
Grid
5
Pin No.
Symbol
Pin Name
Description
6
D
IN
Data input
Inputs serial data at rising edge of shift clock, starting from lower
bit.
5
D
OUT
Data output
Outputs serial data at falling edge of shift clock, starting from
lower bit. This is N-ch open-drain output pin.
9
STB
Strobe
Initializes serial interface at rising or falling edge to make
PD16311 waiting for reception of command. Data input after
STB has fallen is processed as command. While command data
is processed, current processing is stopped, and serial interface
is initialized. While STB is high, CLK is ignored.
8
CLK
Clock input
Reads serial data at rising edge, and outputs data at falling edge.
52
OSC
Oscillator pin
Connect resistor for determining oscillation frequency to this pin.
15 to 26
Seg
1
/KS
1
to
Seg
12
/KS
12
High-voltage output
(segment)
Segment output pins (Dual function as key source)
44 to 37
Grid
1
to Grid
6
High-voltage output (grid)
Grid output pins
27 to 32
35 to 36
Seg
13
/Grid
16
to
Seg
20
/Grid
9
High-voltage output
(segment/grid)
These pins are selectable for segment or grid output.
50 to 46
LED
1
to LED
5
LED output
CMOS output. +20 mA max.
10 to 13
Key
1
to Key
4
Key data input
Data input to these pins is latched at end of display cycle.
1 to 4
SW
1
to SW
4
Switch input
These pins constitute 4-bit general-purpose input port.
14, 33, 45
V
DD
Logic power
5 V 10 %
51
V
SS
Logic ground
Connect this pin to GND of system.
34
V
EE
Pull-down level
V
DD
35 V max.
7
IC
Internally connected
Be sure to leave this pin open (this pin is at V
DD
level).