29
Error
Code
Details of Error code
Display
Coping strategies
52
Connection to DPMS failed when
rewriting
fi
rmware such as Sub
CPU, DSP, FPGA, and PLD.
S u b
* * * m i n
C o n n e c t i o n F a i l 5 2
Check the network connection.
Carry out the update in an environment
that has little network load.
54
Error message received regarding
fi
rmware data after logging in to
DPMS when rewriting
fi
rmware such
as Sub CPU, DSP, FPGA, and PLD.
S u b
* * * m i n
U p d a t i n g
f a i l
5 4
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
55
When rewriting
fi
rmware such as Sub
CPU, DSP, FPGA, and PLD, request
was made for
fi
rmware data after
logging in to DPMS, but it timed out.
S u b
* * * m i n
U p d a t i n g
f a i l
5 5
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
56
Failure to download
fi
rmware after
logging in to DPMS when rewriting
fi
rmware such as Sub CPU, DSP,
FPGA, and PLD.
S u b
* * * m i n
D o w n l o a d
f a i l
5 6
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
57
Firmware download error received
(line congestion) after logging in to
DPMS when rewriting
fi
rmware such
as Sub CPU, DSP, FPGA, and PLD.
S u b
* * * m i n
S e r v e r
i s
b u s y 5 7
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
58
Firmware download error received
(connection failure) after logging in to
DPMS when rewriting
fi
rmware such
as Sub CPU, DSP, FPGA, and PLD.
S u b
* * * m i n
C o n n e c t i o n F a i l 5 8
Turn the power off then back on.
Updating starts automatically.
Carry out the update in an environment
that has little network load.
5A
NACK received when "C" command
sent to Sub CPU, DSP, FPGA, PLD
etc.
S u b
* * * m i n
C o n n e c t i o n F a i l 5 A
Turn the power off then back on.
Updating starts automatically.
5B
NACK received when "L" command
sent to Sub CPU, DSP, FPGA, PLD
etc.
S u b
* * * m i n
U p d a t i n g
f a i l
5 B
Turn the power off then back on.
Updating starts automatically.
5C
Sub CPU, DSP, FPGA, PLD etc.
failed to receive
fi
rmware for
rewriting sent from DM860 (when
timed out).
S u b
* * * m i n
U p d a t i n g
f a i l
5 C
Turn the power off then back on.
Updating starts automatically.
5D
Sub CPU, DSP, FPGA, PLD etc.
failed to receive
fi
rmware for
rewriting sent from DM860 (when
an error).
S u b
* * * m i n
U p d a t i n g
f a i l
5 D
Turn the power off then back on.
Updating starts automatically.
5E
Invalid data in
fi
rmware such as
Sub CPU, DSP, FPGA, and PLD for
rewriting sent from DM860 (when a
Check Sum error).
S u b
* * * m i n
U p d a t i n g
f a i l
5 E
Turn the power off then back on.
Updating starts automatically.
5F
Invalid data in
fi
rmware such as
Sub CPU, DSP, FPGA, and PLD for
rewriting sent from DM860 (invalid
data received).
S u b
* * * m i n
U p d a t i n g
f a i l
5 F
Turn the power off then back on.
Updating starts automatically.
60
NACK received when "P" command
sent to Sub CPU, DSP, FPGA, PLD
etc.
S u b
* * * m i n
U p d a t i n g
f a i l
6 0
Turn the power off then back on.
Updating starts automatically.
61
NACK received when "I" command
sent to Sub CPU, DSP, FPGA, PLD
etc.
S u b
* * * m i n
U p d a t e C h e c k N G
6 1
Turn the power off then back on.
Updating starts automatically.
62
Start failure of Sub
μ
-
com.
S u b
* * * m i n
U p d a t i n g
f a i l
6 2
Turn the power off then back on. Updating
starts automatically.
80
Failure to acquire serial
fl
ash data
and before deleting serial
fl
ash.
O S D
* * * m i n
U p d a t i n g
f a i l
8 0
Turn the power off then back on.
Updating starts automatically.
Summary of Contents for AV7005/N1B
Page 62: ...62 Personal notes ...
Page 64: ...64 BLOCK DIAGRAM ...
Page 139: ...139 R5F3650KNFB HDMI U5500 ...
Page 146: ...146 IS42S32200E6TL HDMI U1602 IS42S32200E6TL Block diagram ...
Page 155: ...155 AK4424ET HDMI U3800 U3801 AK4424ET Block Diagram ...
Page 156: ...156 AK5358BET HDMI U3802 AK5358BET Pin Function ...
Page 160: ...160 HY27UF081G2A TPCB Block Diagram ...
Page 170: ...170 2 FL DISPLAY FLD 19 ST 02GINK FRONT Z1001 PIN CONNECTION GRID ASSIGNMENT ...
Page 171: ...171 ANODE CONNECTION ...
Page 172: ...172 VFD GP1261AI FRONT Z1002 PIN CONNECTION PATTERN DETAIL ...