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Patch Ideas Digital/Gates/Clocking:
Typical Voltage Controlled Pulse (Clock, LFO)
Same as Voltage Controlled Triangle Function, only the output is taken from EOC or EOR. Using EOR, the RISE parame-
ter will more effectively adjust frequency, and FALL parameter will adjust pulse width. Using EOC, the opposite is true:
where Rise more effectively adjusts Width and Fall adjust frequency. All adjustments to Rise and Fall parameters will
affect frequency. HANG input will act as Start/ Stop control with the Clock STOPPING when you send a Gate HIGH to
HANG. FLIP-FLOP (1-Bit Memory) In this patch, Trigger IN acts as the “Set” input, and BOTH Control IN acts as the
“Reset” input. Apply Reset signal to BOTH Control IN. Apply Gate or logic signal to Trigger IN. Set Rise to Full CCW, Fall
to Full CW, Vari-Response to Linear. Take “Q” output from EOR, “NOT Q” from the EOC OUT. This patch has a memory
limit of about 3 minutes, after which it forgets the one thing you told it to remember.
Voltage Controlled Pulse Delay Processor
Apply Trigger or Gate to Trigger IN. Take output from End Of Rise. RISE parameter will set the delay and Fall parameter
will adjust width of the resulting delayed pulse.
Voltage Controlled Flam
Apply Trigger, Clock or Gate to Trigger IN. Set
Rise for Full CCW. Fall for at least 50%. Take output 1 from End Of Rise, and patch to Optomix CH. 1 Strike IN. Take
output 2, the Flam, from EOC, patch to Optomix CH. 2 Strike IN. Apply Signal(s) to be Flammed at Optomix Signal IN 1
and 2. Monitor SUM out. Flam control is performed with the Fall parameter.
Voltage Controlled Clock Divider
Clock signal applied to Trigger IN is processed by a divisor as set by Rise parameter. Increasing Rise sets divisor higher,
resulting in larger divisions. Fall time adjusts the width of the resulting clock. If the Width is adjusted to be greater than the
total time of the division the output will remain “high.” Take output from EOR or EOC.
Sample & Hold
Signal to be processed is patched to Signal IN. Clock signal patched to HANG IN. Clock signal must be wide in order to
achieve S&H. In other words, the clock should be HIGH most of the time, going low for only a short time. An example of
this type of clock signal would be to use another FUNCTION (or a channel of a MATHS). Use the EOC, with Fall set to
Full CCW and setting the Rise to determine the rate. The Rise and Fall parameters determine the range of possible
values.
Track & Hold
Signal to be processed is patched to Signal IN. Clock or Gate signal patched to HANG IN. Signal will pass to the Signal
OUT with the Rise and Fall parameters determining the slew rate. When the HANG IN goes HIGH, the Signal OUT will be
held at the current voltage, until the HANG IN goes Low.
Staircase Function (Triggered or Continuous)
Set up for Typical Voltage Controlled LFO (see above). Patch clock signal to HANG IN. Clock should be at higher frequen-
cy then that of the function.
