MagnaChip MC80C0104, User Manual, Page: 56 / 126

MC80F0104/0204 Preliminary
52 Mar. 2005 Ver 0.2
13.2 16-bit Timer / Counter Mode
The Timer register is being run with all 16 bits. A 16-bit
timer/counter register T0, T1 are incremented from 0000
H
until it matches TDR0, TDR1 and then resets to 0000
H
.
The match output generates Timer 0 interrupt.
The clock source of the Timer 0 is selected either internal
or external clock by bit T0CK[2:0]. In 16-bit mode, the bits
T1CK[1:0] and 16BIT of TM1 should be set to "1" respec-
tively as shown in Figure 13-9 .
Likewise, A 16-bit timer/counter register T2, T3 are incre-
mented from 0000
H
until it matches TDR2, TDR3 and then
resets to 0000
H
. The match output generates Timer 2 inter-
rupt.
The clock source of the Timer 2 is selected either internal
or external clock by bit T2CK[2:0]. In 16-bit mode, the bits
T3CK[1:0] and 16BIT of TM3 should be set to "1" respec-
tively as shown in Figure 13-10 .
Even if the Timer 0 (including Timer 1) is used as a 16-bit
timer, the Timer 2 and Timer 3 can still be used as either
two 8-bit timer or one 16-bit timer by setting the TM3. Re-
versely, even if the Timer 2 (including Timer 3) is used as
a 16-bit timer, the Timer 0 and Timer 1 can still be used as
8-bit timer independently.
Figure 13-9 16-bit Timer/Counter for Timer 0, 1
clear
0: Stop
1: Clear and start
T0ST
T0CN
TDR1 + TDR0
Comparator
TIMER 0 + TIMER 1
→
TIMER 0 (16-bit)
Higher byte Lower byte
(16-bit)
COMPARE DATA
T1 + T0
(16-bit)
(Not Timer 1 interrupt)
EDGE
BTCL
7 6 5 4 3 2 1 0
- - T0CN
INITIAL VALUE: --00 0000
B
ADDRESS: 0D0
H
TM0
T0ST T0CK0 T0CK1 CAP0 T0CK2
- - X X X X
X means don’t care
INITIAL VALUE: 00
H
ADDRESS: 0D2
H
TM1
X means don’t care
0 X
BTCL
7 6 5 4 3 2 1 0
16BIT POL T1CN T1ST T1CK0 T1CK1
PWM1E
CAP1
X 1 X X 1 1 0 0
EC0 PIN
÷
2
÷
4
÷
8
X
IN
PIN
MUX
P
res
caler
T0CK[2:0]
111
000
001
010
÷
32
÷
128
÷
512
÷
2048
011
100
101
110
DETECTOR
T0IF
TIMER 0
INTERRUPT