MagnaChip MC80C0104, User Manual, Page: 114 / 126

MC80F0104/0204 Preliminary
110 Mar. 2005 Ver 0.2
26.4 Reference ISP Circuit Diagram and MagnaChip Supplied ISP Board
The ISP software and hardware circuit diagram are provided at
www.magnachipmcu.com . To get a ISP B/D, contact to sales de-
partment. The following circuit diagram is for reference use..
Figure 26-1 Reference ISP Circuit Diagram
Figure 26-2 MagnaChip supplied ISP Board
T1IN
T2IN
R1OUT
R2OUT
C1+
C1-
C2+
C2-
T1OUT
T2OUT
R1IN
R2IN
V+
VCC
V-
GND
CON1
Female DB9
J2
V
SS
V
DD
J3
External V
DD
RESET/V
PP
MCU_TxD
MCU_RxD
V
DD
V
SS
10uF/
16V
0.
1
uF
MAX232
ACLK_CLK
Vcc
Out
Gnd
OSC
X1
1.8432MHz
22
Ω
0.
1uF
100
Ω
The ragne of V
DD
must be from 4.5 to 5.5V and ISP function is not supported under 2MHz system clock.
If the user supplied V
DD
is out of range, the external power is needed instead of the target system V
DD
.
V
DD
(+5V)
V
SS
V
DD
(+5V)
V
SS
14
7
13
8
2
16
6
15
11
10
12
9
1
3
4
5
V
SS
V
SS
1
2
3
4
5
V
SS
V
DD
(+5V)
6
1uF
1uF
0.
1u
F
1uF
1uF
5
9
4
8
3
7
2
6
1
* V
PP
: V
DD
+ 4V
* V
DD
: +4.5 ~ +5.5V
To PC
To MCU
GND
TxD
RxD
+
+
+
+
+
For the ISP operation, power consumption required is minimum 30mA.
V
DD
V
SS
DTR
V
SS
V
SS
+
10uF
100
Ω
1.
2k
Ω
10
k
Ω
10
k
Ω
2Ν2907