R7D-YS2
EM-7802-E Rev.6 P. 5 / 10
DATA ALLOCATION
‘Begin’ address is determined by the R7D’s node address and the master setting.
R7D-EA16
Begin +0
Begin +0
CH0
CH1
+1
Output Data
• Example 1. Analog Output R7D-EA16, without Status
Analog Output Module
Input Data
Status
Begin +0
Begin +0
CH0
CH1
+1
+2
Output Data
• Example 2. Analog Output R7D-EC16x, with Status
Analog Output Module
R7D-EC16x
Input Data
I/O DATA DESCRIPTIONS
0
15
16-bit binary data
Negative values represented in 2
’
s complements
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ANALOG OUTPUT
0
15
Input 0 (Output 0)
Input 1 (Output 1)
Input 2 (Output 2) 8 points
Input 15 (Output 15)
Input 3 (Output 3)
: : 16 points
Input 7 (Output 7)
Input 8 (Output 8)
: :
0 : OFF
1 : ON
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DISCRETE I/O
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