4-70
Registers
DIOM
Destination I/O-Memory Enable
4
This bit is defined as an I/O Memory Enable bit for the
destination address of a Memory Move or Block Move
Command. If this bit is set, then the destination address
is in I/O space; and if cleared, then the destination
address is in memory space.
This function is useful for memory-to-register operations
using the Memory Move instruction when a LSI53C896
SCSI function is I/O mapped. Bits 4 and 5 of the
register are used to determine the
configuration status of the LSI53C896 SCSI function.
ERL
Enable Read Line
3
This bit enables a PCI Read Line command. If this bit is
set and the chip is about to execute a read cycle other
than an opcode fetch, then the command is 0b1110.
ERMP
Enable Read Multiple
2
If this bit is set and cache mode is enabled, a Read
Multiple command is used on all read cycles when it is
legal.
BOF
Burst Opcode Fetch Enable
1
Setting this bit causes the LSI53C896 SCSI function to
fetch instructions in burst mode. Specifically, the chip
bursts in the first two Dwords of all instructions using a
single bus ownership. If the instruction is a Memory-to-
Memory Move type, the third Dword is accessed in a
subsequent bus ownership. If the instruction is an indirect
type, the additional Dword is accessed in a subsequent
bus ownership. If the instruction is a table indirect block
move type, the chip accesses the remaining two Dwords
in a subsequent bus ownership, thereby fetching the four
Dwords required in two bursts of two Dwords each. If
prefetch is enabled, this bit has no effect. This bit also
has no effect on fetches out of SCRIPTS RAM.
MAN
Manual Start Mode
0
Setting this bit prevents the LSI53C896 SCSI function
from automatically fetching and executing SCSI
SCRIPTS when the
register is written. When this bit is set, the Start DMA bit
in the
register must be set to
begin SCRIPTS execution. Clearing this bit causes the
LSI53C896 SCSI function to automatically begin fetching
*
Summary of Contents for LSI53C896
Page 6: ...vi Preface...
Page 16: ...xvi Contents...
Page 88: ...2 62 Functional Description...
Page 112: ...3 24 Signal Descriptions...
Page 306: ...6 38 Specifications This page intentionally left blank...
Page 310: ...6 42 Specifications This page intentionally left blank...
Page 338: ...6 70 Specifications Figure 6 40 LSI53C896 329 BGA Bottom View...
Page 340: ...6 72 Specifications...
Page 346: ...A 6 Register Summary...
Page 362: ...IX 12 Index...