The interface can operate in a single data rate mode (PDM and PCM) or in dual data rate mode
(PDM only).
In single data rate mode (SDR), the data is set after the falling edge of the bit clock. The delay
between the clock falling edge and the data edge (
T
CHA_EN
) is equal to
13.6 ns
. The data line is
sampled on the clock rising edge.
In dual data rate mode (DDR), the data is set after every clock edge (falling or rising). The delay
between the clock falling edge and the data edge (
T
CHA_EN
) is equal to
13.6 ns
. The delay between
the clock rising edge and the data edge (
T
CHB_EN
) is equal to
12.5 ns
. The data line is sampled on
the every clock edge.
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SoundWire Protocol Analyzer
User Manual V1.0
of
9
29