5.4. I2S Input HD15 Connector
The I2S input interface is mapped on a HD15 male connector.
Signal Name
Pin Number
Function
Master Clock (MCLK)
1
Input
Word Clock (LRCLK)
11
Input
Bit Clock (BCLK)
5
Input
SDIN1
8
Input
SDIN2
13
Input
SDIN3
3
Input
SDIN4
9
Input
GND
2, 4, 6, 7, 10,
12, 14
Ground
The nominal signal level is equal to 3.3V. Maximum input level is 3.6V.
5.5. I2S Output HD15 Connector
The I2S Output interface is mapped on a HD15 male connector.
Signal Name
Pin Number
Function
Master Clock (MCLK)
1
Input
Word Clock (LRCLK)
5
Input
Bit Clock (BCLK)
11
Input
SDIN1
8
Input
SDIN2
13
Input
SDIN3
3
Input
SDIN4
9
Input
GND
2, 4, 6, 7, 10,
12, 14
Ground
The nominal signal level is equal to 3.3V. Maximum input level on Master Clock pin is
3.6V.
SLIMbus Audio Bridge User Manual V0,9 - Draft Version
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