Configure SDRAM by SPD:
This feature allows BIOS to detect the DDR SDRAM information
from the SDRAM’s SPD.
SDRAM
CAS
Latency
Time:
This item controls the latency between the DRAM read command and
the time that the data becomes actually available. The options are: (1.5
Clocks) (2 Clocks) (2.5 Clocks)
SDRAM RAS# Precharge:
This item controls the idle clocks after issuing a pre-charge command
to the DRAM. When an insufficient pre-charge time is given before the
SDRAM to refresh, the refresh process may failed. Thus the data
stored in SDRAM will be lost.
Available options: 2 Clocks / 3 Clocks.
SDRAM RAS to CAS# Delay:
This item controls the latency between the DRAM active command
and read/write command. Shorter the cycle better the performance,
while longer cycle offers more stable system performance. Available
options: 2 Clocks / 3 Clocks
SDRAM Precharge Delay:
This section specifies the idle cycles before pre-charging an idle bank.
Available options: 7 Clocks / 6 Clocks / 5 Clocks.
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