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20

LTC3736

3736fa

APPLICATIO  S I  FOR   ATIO

W

U

U

U

If the external clock frequency is greater than the internal
oscillator’s frequency, f

OSC

, then current is sourced con-

tinuously from the phase detector output, pulling up the
PLLLPF pin. When the external clock frequency is less than
f

OSC

, current is sunk continuously, pulling down the PLLLPF

pin. If the external and internal frequencies are the same
but exhibit a phase difference, the current sources turn on
for an amount of time corresponding to the phase differ-
ence. The voltage on the PLLLPF pin is adjusted until the
phase and frequency of the internal and external oscilla-
tors are identical. At the stable operating point, the phase
detector output is high impedance and the filter capacitor
C

LP

 holds the voltage.

The loop filter components, C

LP

 and R

LP

, smooth out the

current pulses from the phase detector and provide a
stable input to the voltage-controlled oscillator. The filter
components C

LP

 and R

LP

 determine how fast the loop

acquires lock. Typically R

LP

 = 10k and C

LP

 is 2200pF to

0.01

µ

F.

Typically, the external clock (on SYNC/FCB pin) input high
level is 1.6V, while the input low level is 1.2V.

Table 2 summarizes the different states in which the
PLLLPF pin can be used.

Table 2

PLLLPF PIN

SYNC/FCB PIN

FREQUENCY

0V

DC Voltage

300kHz

Floating

DC Voltage

550kHz

V

IN

DC Voltage

750kHz

RC Loop Filter

Clock Signal

Phase-Locked to External Clock

Auxiliary Winding Control Using SYNC/FCB Pin

The SYNC/FCB can be used as an auxiliary feedback to
provide a means of regulating a flyback winding output.
When this pin drops below its ground-referenced 0.6V
threshold, continuous mode operation is forced.

During continuous mode, current flows continuously in
the transformer primary. The auxiliary winding draws
current only when the bottom, synchronous N-channel
MOSFET is on. When primary load currents are low and/or
the V

IN

/V

OUT

 ratio is close to unity, the synchronous

MOSFET may not be on for a sufficient amount of time to
transfer power from the output capacitor to the auxiliary
load. Forced continuous operation will support an auxil-
iary winding as long as there is a sufficient synchronous
MOSFET duty factor. The FCB input pin removes the
requirement that power must be drawn from the trans-
former primary in order to extract power from the auxiliary
winding. With the loop in continuous mode, the auxiliary
output may nominally be loaded without regard to the
primary output load.

The auxiliary output voltage V

AUX

 is normally set as shown

in Figure 10 by the turns ratio N of the transformer:

V

AUX

 

 (N + 1) V

OUT

However, if the controller goes into Burst Mode operation
and halts switching due to a light primary load current,
then V

AUX

 will droop. An external resistor divider from

V

AUX

 to the FCB sets a minimum voltage V

AUX(MIN)

:

V

V

R

R

AUX MIN

(

)

.

=

+

0 6

1

6

5

DIGITAL

PHASE/

FREQUENCY

DETECTOR

OSCILLATOR

2.4V

R

LP

C

LP

3736 F09

PLLLPF

EXTERNAL

OSCILLATOR

SYNC/

FCB

Figure 9. Phase-Locked Loop Block Diagram

Summary of Contents for No Rsense LTC3736

Page 1: ...ent mode architecture with MOSFET VDS sensing eliminates the need for sense resistors and improves efficiency Power loss and noise due to the ESR of the input capacitance are minimized by operating th...

Page 2: ...N PACKAGE 24 LEAD PLASTIC SSOP 24 23 22 21 20 19 18 17 16 15 14 13 SW1 IPRG1 VFB1 ITH1 IPRG2 PLLLPF SGND VIN TRACK VFB2 ITH2 PGOOD SENSE1 PGND BG1 SYNC FCB TG1 PGND TG2 RUN SS BG2 PGND SENSE2 SW2 ORDE...

Page 3: ...0 5 VFB1 2 Input Current Note 5 10 50 nA TRACK Input Current TRACK 0 6V 10 50 nA Overvoltage Protect Threshold Measured at VFB 0 66 0 68 0 7 V Overvoltage Protect Hysteresis 20 mV Auxiliary Feedback T...

Page 4: ...ONTINUOUS MODE SYNC FCB 0V VIN 3 3V VOUT 1 8V ILOAD 200mA FIGURE 17 CIRCUIT 4 s DIV 3736 G05 PULSE SKIPPING MODE SYNC FCB 550kHz IL 1A DIV VIN 5V RLOAD1 RLOAD2 1 FIGURE 15 CIRCUIT 200 s DIV 3736 G06 5...

Page 5: ...vs Temperature Shutdown RUN Threshold vs Temperature RUN SS Pull Up Current vs Temperature Maximum Current Sense Threshold vs Temperature TEMPERATURE C 60 0 RUN SS VOLTAGE V 0 1 0 3 0 4 0 5 1 0 0 7 20...

Page 6: ...nected to VFB2 from VOUT2 should be used to connect to TRACK from VOUT1 PGOOD Pin 9 Pin 12 Power Good Output Voltage Moni tor Open Drain Logic Output This pin is pulled to ground when the voltage on e...

Page 7: ...ns19 13 Pins22 16 Bottom NMOS Gate Drive Output These pins drive the gates of the external N channel MOSFETs These pins have an output swing from PGND to SENSE SENSE1 SENSE2 Pins 21 11 Pins 24 14 Posi...

Page 8: ...HROUGH PGND TG1 SENSE1 VIN VOUT1 CIN COUT1 MP1 MN1 BG1 R1B L1 PGND VFB1 ITH1 RITH1 CITH1 0 6V 0 12V SC1 VFB1 SW1 SENSE1 R1A EXTSS INTSS EAMP SHDN BURSTDIS SLEEP1 0 3V IPROG1 ICMP 0 15V BURSTDIS VFB1 O...

Page 9: ...IREV2 S R RS2 ANTISHOOT THROUGH PGND SENSE2 TG2 SENSE2 VIN VOUT2 COUT2 MP2 MN2 BG2 R2B RTRACKB RTRACKA L2 PGND VFB2 ITH2 TRACK RITH2 CITH2 0 6V 0 12V SC2 TRACK VFB2 SW2 R2A VOUT1 EAMP BURSTDIS SLEEP2...

Page 10: ...citor CSS between the RUN SS and SGND pins As the RUN SS pin continues to OPERATIO U rise linearly from approximately 0 65V to 1 3V being charged by the internal 0 7 A current source the EAMP regulate...

Page 11: ...thresholdonVFB2 isbasedonthesmaller of 0 12V and a fraction of the voltage on the TRACK pin This also allows VOUT2 to start up and track VOUT1 more easily Note that if VOUT1 is truly short circuited O...

Page 12: ...e maximum value of VITH is typically about 1 98V so the maximum sense voltage allowed across the external P channel MOSFET is 125mV 85mV or 204mV for the three respective states of the IPRG pin The pe...

Page 13: ...itry Improvements in both conducted and radiatedEMIalsodirectlyaccrueasaresultofthereduced RMSinputcurrentandvoltage Significantcostandboard footprint savings are also realized by being able to use sm...

Page 14: ...on the ITH pin is internally clamped which limits the maximum current sense threshold VSENSE MAX to approximately 128mV when IPRG is floating 86mV when IPRG is tied low 213mV when IPRG is tied high Th...

Page 15: ...eration Shoot through between the P channel and N channel MOSFETs can most easily be spotted by monitoring the input supply current As the input supply voltage in creases iftheinputsupplycurrentincrea...

Page 16: ...ng the controller clamps the peak inductor current to approximately I V R BURST PEAK SENSE MAX DS ON 1 4 Thecorrespondingaveragecurrentdependsontheamount of ripple current Lower inductor values higher...

Page 17: ...N 2VOUT where IRMS IOUT 2 This simple worst case condition is commonly usedfordesignbecauseevensignificantdeviationsdonot offer much relief Note that capacitor manufacturers ripple current ratings are...

Page 18: ...y COUT is the output capacitance and IRIPPLE is the ripple current in the induc tor The output ripple is highest at maximum input voltage since IRIPPLE increases with input voltage Setting Output Volt...

Page 19: ...type that provides zero degrees phase shift between the external and internal oscillators This type of phasedetectordoesnotexhibitfalselocktoharmonicsof the external clock The output of the phase dete...

Page 20: ...Phase Locked to External Clock Auxiliary Winding Control Using SYNC FCB Pin The SYNC FCB can be used as an auxiliary feedback to provide a means of regulating a flyback winding output When this pin d...

Page 21: ...uceddownto2 4V Alsoshown is the effect on VREF Minimum On Time Considerations Minimumon time tON MIN isthesmallestamountoftime in which the LTC3736 is capable of turning the top P channel MOSFET on an...

Page 22: ...tional loss Checking Transient Response The regulator loop response can be checked by looking at the load transient response Switching regulators take several cycles to respond to a step in load curre...

Page 23: ...ack resistor divid ers ITH compensation networks and the SGND pin The power grounds consist of the terminal of the input and output capacitors and the source of the N channel MOSFET Eachchannelshouldh...

Page 24: ...IPRG2 IPRG1 VFB1 ITH1 SW1 RVIN 10 RITH2 15k CITH2 220pF CSS 10nF CIN 10 F 2 CVIN 1 F VIN 5V VIN CITH2B 100pF RITH1 15k CITH1 220pF CITH1A 100pF RFB1B 187k RFB1A 59k PGOOD VFB2 TRACK 25 ITH2 TG2 LTC37...

Page 25: ...ACKA 59k RFB2A 59k RFB2B 118k COUT2 22 F 2 COUT1 22 F 2 D1 VOUT1 2 5V 2A VOUT2 1 8V 2A 3736 F16 L1 L2 VISHAY IHLP 2525CZ 01 D2 Figure 17 2 Phase Synchronizable Dual Output Synchronous DC DC Converter...

Page 26: ...15k CITH1 220pF CITH1A 100pF RFB1B 187k RFB1A 59k PGOOD VFB2 TRACK 25 ITH2 TG2 LTC3736EUF PGND TG1 SYNC FCB BG1 PGND 22 21 20 19 18 17 16 15 14 13 12 11 10 23 24 1 2 3 4 5 9 8 7 6 SENSE1 MP1 MP2 L1 1...

Page 27: ...697 4 00 0 10 4 SIDES NOTE 1 DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO 220 VARIATION WGGD X TO BE APPROVED 2 ALL DIMENSIONS ARE IN MILLIMETERS 3 DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PAC...

Page 28: ...to 36V 5V and 3 3V LDOs Switching Regulator 5mm 5mm QFN or 28 Lead SSOP LTC3736 1 Dual 2 Phase No RSENSE Synchronous Controller with VIN 2 75V to 9 8V IOUT Up to 5A 4mm 4mm QFN Package Spread Spectrum...

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