19
LTC3736
3736fa
For coincident tracking (V
OUT1
= V
OUT2
during start-up),
R2A = R
TRACKA
R2B
= R
TRACKB
The ramp time for V
OUT2
to rise from 0V to its final value
is:
t
t
R
R A
R A R B
R
R
SS
SS
TRACKA
TRACKA
TRACKB
2
1
1
1
1
=
+
+
•
•
For coincident tracking,
t
t
V
V
SS
SS
OUT F
OUT F
2
1
2
1
=
•
where V
OUT1F
and V
OUT2F
are the final, regulated values of
V
OUT1
and V
OUT2
. V
OUT1
should always be greater than
V
OUT2
when using the TRACK pin. If no tracking function
is desired, then the TRACK pin may be tied to V
IN
. How-
ever, in this situation there would be no (internal nor
external) soft-start on V
OUT2
.
Phase-Locked Loop and Frequency Synchronization
The LTC3736 has a phase-locked loop (PLL) comprised
of an internal voltage-controlled oscillator (VCO) and a
phase detector. This allows the turn-on of the external P-
channel MOSFET of controller 1 to be locked to the rising
edge of an external clock signal applied to the SYNC/FCB
pin. The turn-on of controller 2’s external P-channel
MOSFET is thus 180 degrees out of phase with the
external clock. The phase detector is an edge sensitive
digital type that provides zero degrees phase shift
between the external and internal oscillators. This type of
phase detector does not exhibit false lock to harmonics of
the external clock.
The output of the phase detector is a pair of complemen-
tary current sources that charge or discharge the external
filter network connected to the PLLLPF pin. The relation-
ship between the voltage on the PLLLPF pin and operating
frequency, when there is a clock signal applied to SYNC/
FCB, is shown in Figure 8 and specified in the Electrical
Characteristics table. Note that the LTC3736 can only be
synchronized to an external clock whose frequency is
within range of the LTC3736’s internal VCO, which is
nominally 200kHz to 1MHz. This is guaranteed, over
temperature and variations, to be between 300kHz and
750kHz. A simplified block diagram is shown in Figure 9.
APPLICATIO S I FOR ATIO
W
U
U
U
TIME
(7b) Coincident Tracking
V
OUT1
V
OUT2
OUTPUT VOLTAGE
TIME
3736 F07b,c
(7c) Ratiometric Tracking
V
OUT1
V
OUT2
OUTPUT VOLTAGE
Figures 7b and 7c. Two Different Modes of Output Voltage Tracking
PLLLPF PIN VOLTAGE (V)
0
0
FREQUENCY (kHz)
0.5
1
1.5
2
3736 F08
2.4
200
400
600
800
1000
1200
1400
Figure 8. Relationship Between Oscillator Frequency and Voltage
at the PLLLPF Pin When Synchronizing to an External Clock
